diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2008-02-14 13:24:27 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2008-02-14 13:24:27 +0800 |
commit | 4813946d366a0d61e0be1dacec6d3077bc939b48 (patch) | |
tree | 2a883f1ab3c9388b1b4bcad553d7675067e4c637 /src/mesa/drivers/dri/i965/brw_wm_pass2.c | |
parent | 1202c434d91c56bccc4c918f8284f0602ef4ca0b (diff) |
i965: use setup attributes as inputs when allocating registers
for WM payload. fix #10767
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_pass2.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_pass2.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index c1ce6a9b6b..8541cbcbec 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -69,7 +69,8 @@ static void prealloc_reg(struct brw_wm_compile *c, */ static void init_registers( struct brw_wm_compile *c ) { - GLuint inputs = FRAG_BIT_WPOS | c->fp_interp_emitted; + struct brw_context *brw = c->func.brw; + GLuint inputs = (brw->vs.prog_data->outputs_written & DO_SETUP_BITS); GLuint nr_interp_regs = 0; GLuint i = 0; GLuint j; |