summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_wm_pass2.c
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2009-05-14 09:49:45 -0700
committerEric Anholt <eric@anholt.net>2009-05-14 11:41:04 -0700
commit0f5113deed91611ecdda6596542530b1849bb161 (patch)
tree13c1ec27d8b7c8d0675ef9f8f674d649f8eb345a /src/mesa/drivers/dri/i965/brw_wm_pass2.c
parent64980125c76b05501a6fe7fe20fe52438f459129 (diff)
i965: Fix register allocation of GLSL fp inputs.
Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_pass2.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_pass2.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
index 780edbc42e..08cac730c2 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
@@ -70,7 +70,6 @@ static void prealloc_reg(struct brw_wm_compile *c,
static void init_registers( struct brw_wm_compile *c )
{
struct brw_context *brw = c->func.brw;
- GLuint inputs = (brw->vs.prog_data->outputs_written & DO_SETUP_BITS);
GLuint nr_interp_regs = 0;
GLuint i = 0;
GLuint j;
@@ -85,7 +84,7 @@ static void init_registers( struct brw_wm_compile *c )
prealloc_reg(c, &c->creg[j], i++);
for (j = 0; j < FRAG_ATTRIB_MAX; j++) {
- if (inputs & (1<<j)) {
+ if (c->key.vp_outputs_written & (1<<j)) {
/* index for vs output and ps input are not the same
in shader varying */
GLuint index;