diff options
author | Nicolai Hähnle <nhaehnle@gmail.com> | 2009-09-21 13:26:50 +0200 |
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committer | Nicolai Hähnle <nhaehnle@gmail.com> | 2009-09-21 13:26:50 +0200 |
commit | 81c7561d9d3faf70ac22c6a5f3fbea18f53eed92 (patch) | |
tree | 5ec097e0e1fe99804104d3a56923c16edf1533aa /src/mesa/drivers/dri/i965/brw_wm_surface_state.c | |
parent | f02f63997ce65530788a6dfcb28f11790a14d938 (diff) | |
parent | 3083ba38f4c884b32cd0460607b5064b6b7008d2 (diff) |
Merge branch 'master' into r300-compiler
There were additional non-textual conflicts.
Conflicts:
src/gallium/drivers/r300/r300_tgsi_to_rc.c
src/mesa/drivers/dri/r300/compiler/r3xx_vertprog.c
src/mesa/drivers/dri/r300/compiler/radeon_program.c
src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_wm_surface_state.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 096f74394e..51539ac1e7 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -545,15 +545,20 @@ brw_update_renderbuffer_surface(struct brw_context *brw, irb->texformat->MesaFormat); } key.tiling = region->tiling; - key.width = region->width; - key.height = region->height; + if (brw->intel.intelScreen->driScrnPriv->dri2.enabled) { + key.width = rb->Width; + key.height = rb->Height; + } else { + key.width = region->width; + key.height = region->height; + } key.pitch = region->pitch; key.cpp = region->cpp; key.draw_offset = region->draw_offset; /* cur 3d or cube face offset */ } else { key.surface_type = BRW_SURFACE_NULL; key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; - key.tiling = 0; + key.tiling = I915_TILING_X; key.width = 1; key.height = 1; key.cpp = 4; @@ -629,7 +634,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, drm_intel_bo_emit_reloc(brw->wm.surf_bo[unit], offsetof(struct brw_surface_state, ss1), region_bo, - surf.ss1.base_addr, + surf.ss1.base_addr - region_bo->offset, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); } |