diff options
| author | Eric Anholt <eric@anholt.net> | 2010-02-23 17:42:20 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-02-25 10:53:08 -0800 |
| commit | 078e7b62f69658e40aedea59cf6f005162a29f83 (patch) | |
| tree | 79f068f88ab1fa68ab3cef652b49fdfdcf819526 /src/mesa/drivers/dri/i965/gen6_vs_state.c | |
| parent | c791f8a1e532834ae7a517c042e9efe262b62233 (diff) | |
i965: Emit SNB FF unit state after the unit's push constants.
There's a BUN for the WM unit that says WM_STATE must immediately
follow PS_CONSTANTS, which this addresses. Presumably other units are
roughly the same, too.
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_vs_state.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen6_vs_state.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c index ba00e4e1fb..04fc16e679 100644 --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c @@ -46,21 +46,6 @@ upload_vs_state(struct brw_context *brw) drm_intel_bo *constant_bo; int i; - BEGIN_BATCH(6); - OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2)); - OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) | - (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); - OUT_BATCH(0); /* scratch space base offset */ - OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) | - (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | - (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); - OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) | - GEN6_VS_STATISTICS_ENABLE); - ADVANCE_BATCH(); - - intel_batchbuffer_emit_mi_flush(intel->batch); - if (vp->use_const_buffer || nr_params == 0) { /* Disable the push constant buffers. */ BEGIN_BATCH(5); @@ -106,6 +91,21 @@ upload_vs_state(struct brw_context *brw) } intel_batchbuffer_emit_mi_flush(intel->batch); + + BEGIN_BATCH(6); + OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2)); + OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) | + (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); + OUT_BATCH(0); /* scratch space base offset */ + OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) | + (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) | + (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT)); + OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) | + GEN6_VS_STATISTICS_ENABLE); + ADVANCE_BATCH(); + + intel_batchbuffer_emit_mi_flush(intel->batch); } const struct brw_tracked_state gen6_vs_state = { |