[965] Replace various alignment code with a shared ALIGN() macro.

In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
  wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
  ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.

1 files changed, 1 insertions, 1 deletions

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 7a9e1a2a3f..d1c1c8afb6 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -533,7 +533,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 				  GLenum logic_op)
 {
    struct xy_text_immediate_blit text;
-   int dwords = ((src_size + 7) & ~7) / 4;
+   int dwords = ALIGN(src_size, 8) / 4;
    uint32_t opcode, br13;
 
    assert( logic_op - GL_CLEAR >= 0 );