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authorIan Romanick <ian.d.romanick@intel.com>2011-01-20 13:51:07 -0800
committerIan Romanick <ian.d.romanick@intel.com>2011-01-20 13:51:07 -0800
commit2fb0aebd4a248d2a0725099cd5646253c30c1dc3 (patch)
treecc48c3dedcd6a73e20dcb397e50ef4ce97e2a73b /src/mesa/drivers/dri/i965
parent790ff232e2607a83e6207d06900a5e3de613d161 (diff)
intel: Fix typeos from 3d028024 and 790ff232
...and remove egg from face.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index d3b61abe89..9483ec69d9 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -154,11 +154,11 @@ GLboolean brwCreateContext( int api,
/* Fragment shaders use real, 32-bit twos-complement integers for all
* integer types.
*/
- ctx->FragmentProgram.LowInt.RangeMin = 31;
- ctx->FragmentProgram.LowInt.RangeMax = 30;
- ctx->FragmentProgram.LowInt.Precision = 0;
- ctx->FragmentProgram.HighInt = ctx->FragmentProgram.MediumInt
- = ctx->FragmentProgram.LowInt;
+ ctx->Const.FragmentProgram.LowInt.RangeMin = 31;
+ ctx->Const.FragmentProgram.LowInt.RangeMax = 30;
+ ctx->Const.FragmentProgram.LowInt.Precision = 0;
+ ctx->Const.FragmentProgram.HighInt = ctx->Const.FragmentProgram.MediumInt
+ = ctx->Const.FragmentProgram.LowInt;
/* Gen6 converts quads to polygon in beginning of 3D pipeline,
but we're not sure how it's actually done for vertex order,