[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.

Fencing was used in two places: ensuring that we didn't get too many frames
ahead of ourselves, and glFinish.  glFinish will be satisfied by waiting on
buffers like we would do for CPU access on them.  The "don't get too far ahead"
is now the responsibility of the execution manager (kernel).

1 files changed, 0 insertions, 13 deletions

diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 4890826a19..b7d36d8cd6 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -66,14 +66,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
 
    intelScreen = intel->intelScreen;
 
-   if (intel->last_swap_fence) {
-      dri_fence_wait(intel->last_swap_fence);
-      dri_fence_unreference(intel->last_swap_fence);
-      intel->last_swap_fence = NULL;
-   }
-   intel->last_swap_fence = intel->first_swap_fence;
-   intel->first_swap_fence = NULL;
-
    /* The LOCK_HARDWARE is required for the cliprects.  Buffer offsets
     * should work regardless.
     */
@@ -163,12 +155,7 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
 	 ADVANCE_BATCH();
       }
 
-      if (intel->first_swap_fence)
-	 dri_fence_unreference(intel->first_swap_fence);
       intel_batchbuffer_flush(intel->batch);
-      intel->first_swap_fence = intel->batch->last_fence;
-      if (intel->first_swap_fence)
-	 dri_fence_reference(intel->first_swap_fence);
    }
 
    UNLOCK_HARDWARE(intel);