summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/intel/intel_context.c
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2009-10-26 09:28:32 -0700
committerEric Anholt <eric@anholt.net>2009-11-06 11:37:31 -0800
commitcaf3038123d6d29afd7d1f0cd6db98a2282c3ca1 (patch)
treecfa57e6e0396c9fc7b4728e1cff2aed413165d4a /src/mesa/drivers/dri/intel/intel_context.c
parent4e4c2ee1fd574d1d651c559f46afb6ca5487156d (diff)
Make a convenient int for what chipset generation we're on.
gen2/3/4 are easier to say than "8xx, 915-945/g33/pineview, 965/g45/misc", and compares on generation are often easier than stringing together a bunch of chipset checks.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_context.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index a7d94ced9a..e0022ad548 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -477,7 +477,7 @@ intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
if (intel->Fallback)
_swrast_flush(ctx);
- if (!IS_965(intel->intelScreen->deviceID))
+ if (intel->gen < 4)
INTEL_FIREVERTICES(intel);
/* Emit a flush so that any frontbuffer rendering that might have occurred
@@ -614,6 +614,13 @@ intelInitContext(struct intel_context *intel,
intel->sarea = intelScreen->sarea;
intel->driContext = driContextPriv;
+ if (IS_965(intel->intelScreen->deviceID))
+ intel->gen = 4;
+ else if (IS_9XX(intel->intelScreen->deviceID))
+ intel->gen = 3;
+ else
+ intel->gen = 2;
+
/* Dri stuff */
intel->hHWContext = driContextPriv->hHWContext;
intel->driFd = sPriv->fd;
@@ -621,7 +628,7 @@ intelInitContext(struct intel_context *intel,
driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
intel->driScreen->myNum,
- IS_965(intelScreen->deviceID) ? "i965" : "i915");
+ (intel->gen >= 4) ? "i965" : "i915");
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intel->maxBatchSize = 4096;
else
@@ -683,7 +690,7 @@ intelInitContext(struct intel_context *intel,
meta_init_metaops(ctx, &intel->meta);
ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
- if (IS_965(intelScreen->deviceID)) {
+ if (intel->gen >= 4) {
if (MAX_WIDTH > 8192)
ctx->Const.MaxRenderbufferSize = 8192;
} else {
@@ -720,7 +727,7 @@ intelInitContext(struct intel_context *intel,
break;
}
- if (IS_965(intelScreen->deviceID))
+ if (intel->gen >= 4)
intel->polygon_offset_scale /= 0xffff;
intel->RenderIndex = ~0;
@@ -733,7 +740,7 @@ intelInitContext(struct intel_context *intel,
intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
- if (IS_965(intelScreen->deviceID) && !intel->intelScreen->irq_active) {
+ if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
exit(1);
}