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authorEric Anholt <eric@anholt.net>2011-01-10 10:01:12 -0800
committerEric Anholt <eric@anholt.net>2011-01-10 17:21:10 -0800
commit5b3eb7538cd9ceb967b6e9e765896183e7c2c4d4 (patch)
tree220862ba5058742e9330550c995c687737fd07bf /src/mesa/drivers/dri/intel/intel_mipmap_tree.h
parentda0c0dbab060416452e7c96415abef91ec7d64f4 (diff)
Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663. This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa. I was wrong about which generations supported baselevel adjustment -- it's just gen4, nothing earlier. This meant that i915 would have never used the mag filter when baselevel != 0. Not a severe bug, but not an intentional regression. I think we can fix the performance issue another way.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_mipmap_tree.h')
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index 4bb90bf4ac..760a8bce60 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -93,7 +93,8 @@ struct intel_mipmap_tree
GLenum target;
GLenum internal_format;
- GLuint levels;
+ GLuint first_level;
+ GLuint last_level;
GLuint width0, height0, depth0; /**< Level zero image dimensions */
GLuint cpp;
@@ -123,7 +124,8 @@ struct intel_mipmap_tree *intel_miptree_create(struct intel_context *intel,
GLenum target,
GLenum base_format,
GLenum internal_format,
- GLuint levels,
+ GLuint first_level,
+ GLuint last_level,
GLuint width0,
GLuint height0,
GLuint depth0,