intel-gem: Fix Y-tiling span setup.

The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode.  Instead, guess the correct
tiling in screen setup.

Also, fix the Y-tiling pitch setup.  The pitch to the next tile in Y is
32 scanlines, not 8.

1 files changed, 6 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index 9a73b13951..648bf61240 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -33,6 +33,12 @@
 #include "i915_drm.h"
 #include "xmlconfig.h"
 
+enum tiling_mode {
+   INTEL_TILE_NONE,
+   INTEL_TILE_X,
+   INTEL_TILE_Y
+};
+
 /* XXX: change name or eliminate to avoid conflict with "struct
  * intel_region"!!!
  */