diff options
| author | Eric Anholt <eric@anholt.net> | 2011-01-10 10:01:12 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2011-01-10 17:21:10 -0800 |
| commit | 5b3eb7538cd9ceb967b6e9e765896183e7c2c4d4 (patch) | |
| tree | 220862ba5058742e9330550c995c687737fd07bf /src/mesa/drivers/dri/intel/intel_tex.h | |
| parent | da0c0dbab060416452e7c96415abef91ec7d64f4 (diff) | |
Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663.
This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa.
I was wrong about which generations supported baselevel adjustment --
it's just gen4, nothing earlier. This meant that i915 would have
never used the mag filter when baselevel != 0. Not a severe bug, but
not an intentional regression. I think we can fix the performance
issue another way.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_tex.h')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex.h index 7c76bd48c6..6552ed0d33 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.h +++ b/src/mesa/drivers/dri/intel/intel_tex.h @@ -65,10 +65,4 @@ void intel_tex_unmap_images(struct intel_context *intel, int intel_compressed_num_bytes(GLuint mesaFormat); -struct intel_mipmap_tree * -intel_miptree_create_for_teximage(struct intel_context *intel, - struct intel_texture_object *intelObj, - struct intel_texture_image *intelImage, - GLboolean expect_accelerated_upload); - #endif |