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authorEric Anholt <eric@anholt.net>2007-10-04 12:07:25 -0700
committerEric Anholt <eric@anholt.net>2007-10-04 12:28:49 -0700
commit77e0523fb7769df4bf43747e136b1653b2421b97 (patch)
tree27337de5a5460aad8428969a504621c98e95fb16 /src/mesa/drivers/dri/intel/intel_tex_layout.c
parent0fc9efd8f0b1b6c4e3525a50e3478e5aef72531a (diff)
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues: - Scratch space allocation was aligned into units of 1KB, while the allocation wanted units of bytes, so we never allocated enough space for scratch. - GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_tex_layout.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_layout.c20
1 files changed, 7 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index fdecd3e186..e3c6e1c17c 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -34,12 +34,6 @@
#include "intel_tex_layout.h"
#include "macros.h"
-
-static int align(int value, int alignment)
-{
- return (value + alignment - 1) & ~(alignment - 1);
-}
-
GLuint intel_compressed_alignment(GLenum internalFormat)
{
GLuint alignment = 4;
@@ -70,7 +64,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
if (mt->compressed) {
align_w = intel_compressed_alignment(mt->internal_format);
- mt->pitch = align(mt->width0, align_w);
+ mt->pitch = ALIGN(mt->width0, align_w);
}
/* May need to adjust pitch to accomodate the placement of
@@ -82,10 +76,10 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
GLuint mip1_width;
if (mt->compressed) {
- mip1_width = align(minify(mt->width0), align_w)
- + align(minify(minify(mt->width0)), align_w);
+ mip1_width = ALIGN(minify(mt->width0), align_w)
+ + ALIGN(minify(minify(mt->width0)), align_w);
} else {
- mip1_width = align(minify(mt->width0), align_w)
+ mip1_width = ALIGN(minify(mt->width0), align_w)
+ minify(minify(mt->width0));
}
@@ -97,7 +91,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
/* Pitch must be a whole number of dwords, even though we
* express it in texels.
*/
- mt->pitch = align(mt->pitch * mt->cpp, 4) / mt->cpp;
+ mt->pitch = ALIGN(mt->pitch * mt->cpp, 4) / mt->cpp;
mt->total_height = 0;
for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
@@ -109,7 +103,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
if (mt->compressed)
img_height = MAX2(1, height/4);
else
- img_height = align(height, align_h);
+ img_height = ALIGN(height, align_h);
/* Because the images are packed better, the final offset
@@ -120,7 +114,7 @@ void i945_miptree_layout_2d( struct intel_mipmap_tree *mt )
/* Layout_below: step right after second mipmap.
*/
if (level == mt->first_level + 1) {
- x += align(width, align_w);
+ x += ALIGN(width, align_w);
}
else {
y += img_height;