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authorEric Anholt <eric@anholt.net>2011-01-05 17:02:08 -0800
committerEric Anholt <eric@anholt.net>2011-01-05 18:23:54 -0800
commit7ce6517f3ac41bf770ab39aba4509d4f535ef663 (patch)
tree3563dc5da10a71f71981a0ceb5fdbd00b37a1f79 /src/mesa/drivers/dri/intel/intel_tex_layout.c
parent01b70c06284f3a0ab2de61228b73c78ed00a1a14 (diff)
intel: Always allocate miptrees from level 0, not tObj->BaseLevel.
BaseLevel/MaxLevel are mostly used for two things: clamping texture access for FBO rendering, and limiting the used mipmap levels when incrementally loading textures. By restricting our mipmap trees to just the current BaseLevel/MaxLevel, we caused reallocation thrashing in the common case, for a theoretical win if someone really did want just levels 2..4 or whatever of their texture object. Bug #30366
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_tex_layout.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_layout.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index d39733b6c5..540ef36a41 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -86,7 +86,7 @@ void i945_miptree_layout_2d(struct intel_context *intel,
* constraints of mipmap placement push the right edge of the
* 2nd mipmap out past the width of its parent.
*/
- if (mt->first_level != mt->last_level) {
+ if (mt->levels > 1) {
GLuint mip1_width;
if (mt->compressed) {
@@ -104,7 +104,7 @@ void i945_miptree_layout_2d(struct intel_context *intel,
mt->total_height = 0;
- for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
+ for (level = 0; level < mt->levels; level++) {
GLuint img_height;
intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
@@ -123,7 +123,7 @@ void i945_miptree_layout_2d(struct intel_context *intel,
/* Layout_below: step right after second mipmap.
*/
- if (level == mt->first_level + 1) {
+ if (level == 1) {
x += ALIGN(width, align_w);
}
else {