diff options
author | Brian Paul <brianp@vmware.com> | 2009-01-14 16:42:19 -0700 |
---|---|---|
committer | Brian Paul <brianp@vmware.com> | 2009-01-14 16:49:24 -0700 |
commit | 947d1c5b2a70c0eafa4c408b47607574a2908468 (patch) | |
tree | d7ace9712ef4e69aa74db43d28623e6670bc05c7 /src/mesa/drivers/dri/intel | |
parent | c7f43543af8a0bf95750eb6d332fdede07d104ea (diff) |
i965: asst. fixes, work-arounds for FBOs and render to texture
OpenGL allows mixing and matching depth and stencil renderbuffers in
framebuffer objects while the hardware really only supports interleaved
depth/stencil buffers. This makes for some tricky buffer management.
An extra wrinkle is the situation where the user allocates a 16bpp depth
texture or renderbuffer then tries to render to it along with a stencil
buffer. We'd have to promote the 16bpp Z values to 24-bit Z values and
mix in the stencil values to setup the depth/stencil renderbuffer.
There's no support for that now, so always allocate 32bpp depth textures/
renderbuffers for now.
Diffstat (limited to 'src/mesa/drivers/dri/intel')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_depthstencil.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_format.c | 10 |
3 files changed, 21 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_depthstencil.c b/src/mesa/drivers/dri/intel/intel_depthstencil.c index f43b9aed48..354b3bf0d7 100644 --- a/src/mesa/drivers/dri/intel/intel_depthstencil.c +++ b/src/mesa/drivers/dri/intel/intel_depthstencil.c @@ -110,7 +110,10 @@ intel_unpair_depth_stencil(GLcontext *ctx, struct intel_renderbuffer *irb) ASSERT(stencilIrb->PairedDepth == rb->Name); intel_renderbuffer_map(intel, rb); intel_renderbuffer_map(intel, stencilRb); +#if 0 + /* disable for now */ _mesa_extract_stencil(ctx, rb, stencilRb); +#endif intel_renderbuffer_unmap(intel, stencilRb); intel_renderbuffer_unmap(intel, rb); stencilIrb->PairedDepth = 0; @@ -132,7 +135,10 @@ intel_unpair_depth_stencil(GLcontext *ctx, struct intel_renderbuffer *irb) ASSERT(depthIrb->PairedStencil == rb->Name); intel_renderbuffer_map(intel, rb); intel_renderbuffer_map(intel, depthRb); +#if 0 + /* disable for now */ _mesa_extract_stencil(ctx, depthRb, rb); +#endif intel_renderbuffer_unmap(intel, depthRb); intel_renderbuffer_unmap(intel, rb); depthIrb->PairedStencil = 0; diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 93fc84503e..54f2fa5287 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -248,11 +248,18 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, cpp = 4; break; case GL_DEPTH_COMPONENT16: +#if 0 rb->_ActualFormat = GL_DEPTH_COMPONENT16; rb->DataType = GL_UNSIGNED_SHORT; rb->DepthBits = 16; cpp = 2; break; +#else + /* fall-through. + * 16bpp depth renderbuffer can't be paired with a stencil buffer so + * always used combined depth/stencil format. + */ +#endif case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT24: case GL_DEPTH_COMPONENT32: diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c index 2be060dd3e..5e418ac446 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_format.c +++ b/src/mesa/drivers/dri/intel/intel_tex_format.c @@ -134,8 +134,14 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, case GL_DEPTH_COMPONENT16: case GL_DEPTH_COMPONENT24: case GL_DEPTH_COMPONENT32: +#if 0 return &_mesa_texformat_z16; - +#else + /* fall-through. + * 16bpp depth texture can't be paired with a stencil buffer so + * always used combined depth/stencil format. + */ +#endif case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: return &_mesa_texformat_s8_z24; @@ -158,7 +164,7 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat, case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT: case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT: case GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT: - return &_mesa_texformat_srgb_dxt1; + return &_mesa_texformat_srgb_dxt1; #endif default: |