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| author | Roland Scheidegger <rscheidegger@gmx.ch> | 2005-02-10 22:36:06 +0000 |
|---|---|---|
| committer | Roland Scheidegger <rscheidegger@gmx.ch> | 2005-02-10 22:36:06 +0000 |
| commit | 4837ea30208d002bc36a836d2117f826d40c8bfa (patch) | |
| tree | 4db5a234a5af7d7f02a42ed824b85e938066828d /src/mesa/drivers/dri/r200/r200_reg.h | |
| parent | 26d31591257d575362776972439f614948366dd1 (diff) | |
add texture micro and macro tiling to radeon/r200 driver. This can improve performance up to 15% in texture-intensive applications. Convert the driver to use the correct blit format and blit width instead of fixed blit format and blit width when uploading textures to make it work.
Diffstat (limited to 'src/mesa/drivers/dri/r200/r200_reg.h')
| -rw-r--r-- | src/mesa/drivers/dri/r200/r200_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index c1132e54ab..2468c6cebf 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -968,6 +968,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_TXO_ENDIAN_BYTE_SWAP (1 << 0) #define R200_TXO_ENDIAN_WORD_SWAP (2 << 0) #define R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0) +#define R200_TXO_MACRO_TILE (1 << 2) +#define R200_TXO_MICRO_TILE (1 << 3) #define R200_TXO_OFFSET_MASK 0xffffffe0 #define R200_TXO_OFFSET_SHIFT 5 #define R200_PP_CUBIC_OFFSET_F1_0 0x2d04 |