diff options
author | Ian Romanick <ian.d.romanick@intel.com> | 2009-09-10 15:33:45 -0700 |
---|---|---|
committer | Ian Romanick <ian.d.romanick@intel.com> | 2009-09-10 15:33:45 -0700 |
commit | b8e1e8d2d8ae6ffbf8f271b46ee89788a926b3b0 (patch) | |
tree | 5db502ab80287bfc8ff61082784017c7448464f5 /src/mesa/drivers/dri/r200 | |
parent | 81722c5d7e8e93d837510b9e6e5d014ec64cf4b3 (diff) | |
parent | d9dc4cb0e4f578da9e50c9d1ba6fd9c22ea2fca6 (diff) |
Merge branch 'master' into asm-shader-rework-2
Conflicts:
src/mesa/shader/lex.yy.c
src/mesa/shader/program_parse.tab.c
src/mesa/shader/program_parse.tab.h
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_cmdbuf.c | 10 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_context.h | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_ioctl.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.c | 17 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_state_init.c | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_tcl.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_texstate.c | 2 |
7 files changed, 47 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c index 7d0df5519d..1d1bea6f5f 100644 --- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c +++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c @@ -225,7 +225,17 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, return retval; } +void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count) +{ + BATCH_LOCALS(&rmesa->radeon); + if (rmesa->radeon.radeonScreen->kernel_mm) { + BEGIN_BATCH_NO_AUTOSTATE(2); + OUT_BATCH(CP_PACKET0(R200_SE_VF_MAX_VTX_INDX, 0)); + OUT_BATCH(count); + END_BATCH(); + } +} void r200EmitVertexAOS( r200ContextPtr rmesa, GLuint vertex_size, diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index c5dccf0a75..246f98c6dc 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -479,6 +479,11 @@ struct r200_texture_state { #define R200_QUERYOBJ_DATA_0 1 #define R200_QUERYOBJ_CMDSIZE 2 +#define STP_CMD_0 0 +#define STP_DATA_0 1 +#define STP_CMD_1 2 +#define STP_STATE_SIZE 35 + struct r200_hw_state { /* Hardware state, stored as cmdbuf commands: * -- Need to doublebuffer for @@ -521,6 +526,7 @@ struct r200_hw_state { struct radeon_state_atom atf; struct radeon_state_atom spr; struct radeon_state_atom ptp; + struct radeon_state_atom stp; }; struct r200_state { diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h index 9f06d23b38..8d51aefa04 100644 --- a/src/mesa/drivers/dri/r200/r200_ioctl.h +++ b/src/mesa/drivers/dri/r200/r200_ioctl.h @@ -44,6 +44,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "drm.h" #include "radeon_drm.h" +extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count); extern void r200EmitVertexAOS( r200ContextPtr rmesa, GLuint vertex_size, struct radeon_bo *bo, diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index fea7681c8a..76852e315c 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2466,6 +2466,21 @@ static void r200WrapRunPipeline( GLcontext *ctx ) } +static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + r200ContextPtr r200 = R200_CONTEXT(ctx); + GLint i; + + radeon_firevertices(&r200->radeon); + + R200_STATECHANGE(r200, stp); + + /* Must flip pattern upside down. + */ + for ( i = 31 ; i >= 0; i--) { + r200->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; + } +} /* Initialize the driver's state functions. */ void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ) @@ -2503,7 +2518,7 @@ void r200InitStateFuncs( struct dd_function_table *functions, GLboolean dri2 ) functions->PolygonMode = r200PolygonMode; functions->PolygonOffset = r200PolygonOffset; if (dri2) - functions->PolygonStipple = radeonPolygonStipple; + functions->PolygonStipple = r200PolygonStipple; else functions->PolygonStipple = radeonPolygonStipplePreKMS; functions->PointParameterfv = r200PointParameter; diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index 4c484d067e..7697306d88 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -271,7 +271,7 @@ CHECK( pix_zero, !ctx->ATIFragmentShader._Enabled, 0 ) CHECK( afs_pass1, (ctx->ATIFragmentShader._Enabled && (ctx->ATIFragmentShader.Current->NumPasses > 1)), 0 ) CHECK( afs, ctx->ATIFragmentShader._Enabled, 0 ) CHECK( tex_cube, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 3 + 3*5 - CUBE_STATE_SIZE ) -CHECK( tex_cube_cs, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 2 + 2*5 - CUBE_STATE_SIZE ) +CHECK( tex_cube_cs, rmesa->state.texture.unit[atom->idx].unitneeded & TEXTURE_CUBE_BIT, 2 + 4*5 - CUBE_STATE_SIZE ) TCL_CHECK( tcl_fog, ctx->Fog.Enabled, 0 ) TCL_CHECK( tcl_fog_add4, ctx->Fog.Enabled, 4 ) TCL_CHECK( tcl, GL_TRUE, 0 ) @@ -764,7 +764,7 @@ static void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) for (j = 1; j <= 5; j++) { OUT_BATCH(CP_PACKET0(R200_PP_CUBIC_OFFSET_F1_0 + (24*i) + (4 * (j-1)), 0)); OUT_BATCH_RELOC(lvl->faces[j].offset, t->mt->bo, lvl->faces[j].offset, - RADEON_GEM_DOMAIN_VRAM, 0, 0); + RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); } } END_BATCH(); @@ -885,6 +885,10 @@ void r200InitState( r200ContextPtr rmesa ) } } } + /* polygon stipple is done with irq for non-kms */ + if (rmesa->radeon.radeonScreen->kernel_mm) { + ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 ); + } for (i = 0; i < 6; i++) if (rmesa->radeon.radeonScreen->kernel_mm) @@ -1117,6 +1121,11 @@ void r200InitState( r200ContextPtr rmesa ) rmesa->hw.sci.cmd[SCI_CMD_2] = CP_PACKET0(R200_RE_WIDTH_HEIGHT, 0); if (rmesa->radeon.radeonScreen->kernel_mm) { + + rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0); + rmesa->hw.stp.cmd[STP_DATA_0] = 0; + rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31); + rmesa->hw.mtl[0].emit = mtl_emit; rmesa->hw.mtl[1].emit = mtl_emit; diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index 348294cefc..c702910ef2 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -161,6 +161,7 @@ static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr ) r200EmitAOS( rmesa, rmesa->radeon.tcl.aos_count, 0 ); + r200EmitMaxVtxIndex(rmesa, rmesa->radeon.tcl.aos[0].count); return r200AllocEltsOpenEnded( rmesa, rmesa->tcl.hw_primitive, nr ); } } diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 90da44bc01..c94834752e 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -1084,6 +1084,8 @@ static void disable_tex_obj_state( r200ContextPtr rmesa, R200_STATECHANGE( rmesa, vtx ); rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] &= ~(7 << (unit * 3)); + R200_STATECHANGE( rmesa, ctx ); + rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~(R200_TEX_0_ENABLE << unit); if (rmesa->radeon.TclFallback & (R200_TCL_FALLBACK_TEXGEN_0<<unit)) { TCL_FALLBACK( rmesa->radeon.glCtx, (R200_TCL_FALLBACK_TEXGEN_0<<unit), GL_FALSE); } |