diff options
| author | Oliver McFadden <z3ro.geek@gmail.com> | 2008-02-29 05:48:31 +0000 |
|---|---|---|
| committer | Oliver McFadden <z3ro.geek@gmail.com> | 2008-03-01 06:33:07 +0000 |
| commit | c30cc5904dc61c27ea7a4ebf5928c53bca6a7b1d (patch) | |
| tree | 3fae3eeb30eafb4fad0e83063e41ecd1051511a7 /src/mesa/drivers/dri/r300/r300_reg.h | |
| parent | 3129d8b512d50335fc5c219b65e36fcaaffcd247 (diff) | |
r300: Added the PVS_SRC_OPERAND documentation from AMD.
Diffstat (limited to 'src/mesa/drivers/dri/r300/r300_reg.h')
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_reg.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 041ba85665..b059c1671d 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -2543,6 +2543,41 @@ enum { PVS_DST_ADDR_MODE_0_SHIFT = 31, }; +/* PVS Source Operand Description */ + +enum { + PVS_SRC_REG_TYPE_MASK = 0x3, + PVS_SRC_REG_TYPE_SHIFT = 0, + SPARE_0_MASK = 0x1, + SPARE_0_SHIFT = 2, + PVS_SRC_ABS_XYZW_MASK = 0x1, + PVS_SRC_ABS_XYZW_SHIFT = 3, + PVS_SRC_ADDR_MODE_0_MASK = 0x1, + PVS_SRC_ADDR_MODE_0_SHIFT = 4, + PVS_SRC_OFFSET_MASK = 0xff, + PVS_SRC_OFFSET_SHIFT = 5, + PVS_SRC_SWIZZLE_X_MASK = 0x7, + PVS_SRC_SWIZZLE_X_SHIFT = 13, + PVS_SRC_SWIZZLE_Y_MASK = 0x7, + PVS_SRC_SWIZZLE_Y_SHIFT = 16, + PVS_SRC_SWIZZLE_Z_MASK = 0x7, + PVS_SRC_SWIZZLE_Z_SHIFT = 19, + PVS_SRC_SWIZZLE_W_MASK = 0x7, + PVS_SRC_SWIZZLE_W_SHIFT = 22, + PVS_SRC_MODIFIER_X_MASK = 0x1, + PVS_SRC_MODIFIER_X_SHIFT = 25, + PVS_SRC_MODIFIER_Y_MASK = 0x1, + PVS_SRC_MODIFIER_Y_SHIFT = 26, + PVS_SRC_MODIFIER_Z_MASK = 0x1, + PVS_SRC_MODIFIER_Z_SHIFT = 27, + PVS_SRC_MODIFIER_W_MASK = 0x1, + PVS_SRC_MODIFIER_W_SHIFT = 28, + PVS_SRC_ADDR_SEL_MASK = 0x3, + PVS_SRC_ADDR_SEL_SHIFT = 29, + PVS_SRC_ADDR_MODE_1_MASK = 0x0, + PVS_SRC_ADDR_MODE_1_SHIFT = 32, +}; + /*\}*/ /* BEGIN: Packet 3 commands */ |