r200r300: start merging span code

1 files changed, 0 insertions, 217 deletions

diff --git a/src/mesa/drivers/dri/r300/radeon_span.c b/src/mesa/drivers/dri/r300/radeon_span.c
index 30dde80994..5019ee4432 100644
--- a/src/mesa/drivers/dri/r300/radeon_span.c
+++ b/src/mesa/drivers/dri/r300/radeon_span.c
@@ -79,133 +79,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define HW_UNLOCK()
 
-static GLubyte *radeon_ptr32(const struct radeon_renderbuffer * rrb,
-                             GLint x, GLint y)
-{
-    GLubyte *ptr = rrb->bo->ptr;
-    uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
-    GLint offset;
-    GLint nmacroblkpl;
-    GLint nmicroblkpl;
-
-    if (rrb->has_surface || !(rrb->bo->flags & mask)) {
-        offset = x * rrb->cpp + y * rrb->pitch;
-    } else {
-        offset = 0;
-        if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) {
-            if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE) {
-                nmacroblkpl = rrb->pitch >> 5;
-                offset += ((y >> 4) * nmacroblkpl) << 11;
-                offset += ((y & 15) >> 1) << 8;
-                offset += (y & 1) << 4;
-                offset += (x >> 5) << 11;
-                offset += ((x & 31) >> 2) << 5;
-                offset += (x & 3) << 2;
-            } else {
-                nmacroblkpl = rrb->pitch >> 6;
-                offset += ((y >> 3) * nmacroblkpl) << 11;
-                offset += (y & 7) << 8;
-                offset += (x >> 6) << 11;
-                offset += ((x & 63) >> 3) << 5;
-                offset += (x & 7) << 2;
-            }
-        } else {
-            nmicroblkpl = ((rrb->pitch + 31) & ~31) >> 5;
-            offset += (y * nmicroblkpl) << 5;
-            offset += (x >> 3) << 5;
-            offset += (x & 7) << 2;
-        }
-    }
-    return &ptr[offset];
-}
-
-static GLubyte *radeon_ptr16(const struct radeon_renderbuffer * rrb,
-                             GLint x, GLint y)
-{
-    GLubyte *ptr = rrb->bo->ptr;
-    uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
-    GLint offset;
-    GLint nmacroblkpl;
-    GLint nmicroblkpl;
-
-    if (rrb->has_surface || !(rrb->bo->flags & mask)) {
-        offset = x * rrb->cpp + y * rrb->pitch;
-    } else {
-        offset = 0;
-        if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) {
-            if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE) {
-                nmacroblkpl = rrb->pitch >> 6;
-                offset += ((y >> 4) * nmacroblkpl) << 11;
-                offset += ((y & 15) >> 1) << 8;
-                offset += (y & 1) << 4;
-                offset += (x >> 6) << 11;
-                offset += ((x & 63) >> 3) << 5;
-                offset += (x & 7) << 1;
-            } else {
-                nmacroblkpl = rrb->pitch >> 7;
-                offset += ((y >> 3) * nmacroblkpl) << 11;
-                offset += (y & 7) << 8;
-                offset += (x >> 7) << 11;
-                offset += ((x & 127) >> 4) << 5;
-                offset += (x & 15) << 2;
-            }
-        } else {
-            nmicroblkpl = ((rrb->pitch + 31) & ~31) >> 5;
-            offset += (y * nmicroblkpl) << 5;
-            offset += (x >> 4) << 5;
-            offset += (x & 15) << 2;
-        }
-    }
-    return &ptr[offset];
-}
-
-static GLubyte *radeon_ptr(const struct radeon_renderbuffer * rrb,
-                           GLint x, GLint y)
-{
-    GLubyte *ptr = rrb->bo->ptr;
-    uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
-    GLint offset;
-    GLint microblkxs;
-    GLint macroblkxs;
-    GLint nmacroblkpl;
-    GLint nmicroblkpl;
-
-    if (rrb->has_surface || !(rrb->bo->flags & mask)) {
-        offset = x * rrb->cpp + y * rrb->pitch;
-    } else {
-        offset = 0;
-        if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE) {
-            if (rrb->bo->flags & RADEON_BO_FLAGS_MICRO_TILE) {
-                microblkxs = 16 / rrb->cpp;
-                macroblkxs = 128 / rrb->cpp;
-                nmacroblkpl = rrb->pitch / macroblkxs;
-                offset += ((y >> 4) * nmacroblkpl) << 11;
-                offset += ((y & 15) >> 1) << 8;
-                offset += (y & 1) << 4;
-                offset += (x / macroblkxs) << 11;
-                offset += ((x & (macroblkxs - 1)) / microblkxs) << 5;
-                offset += (x & (microblkxs - 1)) * rrb->cpp;
-            } else {
-                microblkxs = 32 / rrb->cpp;
-                macroblkxs = 256 / rrb->cpp;
-                nmacroblkpl = rrb->pitch / macroblkxs;
-                offset += ((y >> 3) * nmacroblkpl) << 11;
-                offset += (y & 7) << 8;
-                offset += (x / macroblkxs) << 11;
-                offset += ((x & (macroblkxs - 1)) / microblkxs) << 5;
-                offset += (x & (microblkxs - 1)) * rrb->cpp;
-            }
-        } else {
-            microblkxs = 32 / rrb->cpp;
-            nmicroblkpl = ((rrb->pitch + 31) & ~31) >> 5;
-            offset += (y * nmicroblkpl) << 5;
-            offset += (x / microblkxs) << 5;
-            offset += (x & (microblkxs - 1)) * rrb->cpp;
-        }
-    }
-    return &ptr[offset];
-}
-
 /* ================================================================
  * Color buffer
  */
@@ -345,96 +218,6 @@ do {									\
 #define TAG(x) radeon##x##_z24_s8
 #include "stenciltmp.h"
 
-static void map_buffer(struct gl_renderbuffer *rb, GLboolean write)
-{
-	struct radeon_renderbuffer *rrb = (void*)rb;
-    int r;
-
-	if (rrb->bo) {
-        r = radeon_bo_map(rrb->bo, write);
-        if (r) {
-            fprintf(stderr, "(%s) error(%d) mapping buffer.\n",
-                    __FUNCTION__, r);
-        }
-    }
-}
-
-static void unmap_buffer(struct gl_renderbuffer *rb)
-{
-	struct radeon_renderbuffer *rrb = (void*)rb;
-
-	if (rrb->bo) {
-        radeon_bo_unmap(rrb->bo);
-    }
-}
-
-/* Move locking out to get reasonable span performance (10x better
- * than doing this in HW_LOCK above).  WaitForIdle() is the main
- * culprit.
- */
-
-static void radeonSpanRenderStart(GLcontext * ctx)
-{
-	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-	int i;
-#ifdef COMPILE_R300
-	r300ContextPtr r300 = (r300ContextPtr) rmesa;
-	R300_FIREVERTICES(r300);
-#else
-	RADEON_FIREVERTICES(rmesa);
-#endif
-
-	for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
-		if (ctx->Texture.Unit[i]._ReallyEnabled)
-			ctx->Driver.MapTexture(ctx, ctx->Texture.Unit[i]._Current);
-	}
-
-	/* color draw buffers */
-	for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
-		map_buffer(ctx->DrawBuffer->_ColorDrawBuffers[i], GL_TRUE);
-    }
-
-	map_buffer(ctx->ReadBuffer->_ColorReadBuffer, GL_FALSE);
-
-	if (ctx->DrawBuffer->_DepthBuffer) {
-		map_buffer(ctx->DrawBuffer->_DepthBuffer->Wrapped, GL_TRUE);
-    }
-	if (ctx->DrawBuffer->_StencilBuffer)
-		map_buffer(ctx->DrawBuffer->_StencilBuffer->Wrapped, GL_TRUE);
-
-	/* The locking and wait for idle should really only be needed in classic mode.
-	 * In a future memory manager based implementation, this should become
-	 * unnecessary due to the fact that mapping our buffers, textures, etc.
-	 * should implicitly wait for any previous rendering commands that must
-	 * be waited on. */
-	LOCK_HARDWARE(rmesa);
-	radeonWaitForIdleLocked(rmesa);
-}
-
-static void radeonSpanRenderFinish(GLcontext * ctx)
-{
-	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
-	int i;
-	_swrast_flush(ctx);
-	UNLOCK_HARDWARE(rmesa);
-
-	for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
-		if (ctx->Texture.Unit[i]._ReallyEnabled)
-			ctx->Driver.UnmapTexture(ctx, ctx->Texture.Unit[i]._Current);
-	}
-
-	/* color draw buffers */
-	for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++)
-		unmap_buffer(ctx->DrawBuffer->_ColorDrawBuffers[i]);
-
-	unmap_buffer(ctx->ReadBuffer->_ColorReadBuffer);
-
-	if (ctx->DrawBuffer->_DepthBuffer)
-		unmap_buffer(ctx->DrawBuffer->_DepthBuffer->Wrapped);
-	if (ctx->DrawBuffer->_StencilBuffer)
-		unmap_buffer(ctx->DrawBuffer->_StencilBuffer->Wrapped);
-}
-
 void radeonInitSpanFuncs(GLcontext * ctx)
 {
 	struct swrast_device_driver *swdd =