Simple TCL stage and ability to disable vps.

4 files changed, 54 insertions, 6 deletions

diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index da8497c4ee..80f53ee719 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -102,12 +102,13 @@ static const char *const card_extensions[] = {
 };
 
 extern struct tnl_pipeline_stage _r300_render_stage;
+extern struct tnl_pipeline_stage _r300_tcl_stage;
 
 static const struct tnl_pipeline_stage *r300_pipeline[] = {
 
 	/* Try and go straight to t&l
 	 */
-//	&_r300_tcl_stage,
+	&_r300_tcl_stage,
 
 	/* Catch any t&l fallbacks
 	 */
diff --git a/src/mesa/drivers/dri/r300/r300_maos.c b/src/mesa/drivers/dri/r300/r300_maos.c
index 39d446034a..946eb31f0c 100644
--- a/src/mesa/drivers/dri/r300/r300_maos.c
+++ b/src/mesa/drivers/dri/r300/r300_maos.c
@@ -272,7 +272,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd)
 		} \
 }
 
-	if (rmesa->current_vp != NULL) {
+	if (rmesa->current_vp != NULL && ctx->VertexProgram._Enabled) {
 		if (rmesa->current_vp->inputs[VERT_ATTRIB_POS] != -1) {
 			inputs |= _TNL_BIT_POS;
 			rmesa->state.aos[nr++].aos_reg = rmesa->current_vp->inputs[VERT_ATTRIB_POS];
@@ -497,7 +497,7 @@ drm_radeon_cmd_header_t *cmd = NULL;
 #endif
 
 	/* Stage 3: VAP output */
-	if (rmesa->current_vp != NULL)
+	if (rmesa->current_vp != NULL && ctx->VertexProgram._Enabled)
 		outputs = rmesa->current_vp->outputs;
 	else
 		outputs = inputs;
diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 19377c2d34..b855c81673 100644
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -672,7 +672,7 @@ static void r300_check_render(GLcontext *ctx, struct tnl_pipeline_stage *stage)
 		stage->active = GL_FALSE;
 		return;
 	}
-
+		
 
 	/* I'm almost certain I forgot something here */
 #if 0 /* These should work now.. */
@@ -731,3 +731,50 @@ const struct tnl_pipeline_stage _r300_render_stage = {
 	r300_check_render,	/* check */
 	r300_run_render		/* run */
 };
+	
+static GLboolean r300_run_tcl_render(GLcontext *ctx,
+				 struct tnl_pipeline_stage *stage)
+{
+   r300ContextPtr rmesa = R300_CONTEXT(ctx);
+   TNLcontext *tnl = TNL_CONTEXT(ctx);
+   struct vertex_buffer *VB = &tnl->vb;
+   GLuint i;
+
+	if (RADEON_DEBUG & DEBUG_PRIMS)
+		fprintf(stderr, "%s\n", __FUNCTION__);
+
+	return r300_run_vb_render(ctx, stage);
+}
+
+static void r300_check_tcl_render(GLcontext *ctx, struct tnl_pipeline_stage *stage)
+{
+	r300ContextPtr r300 = R300_CONTEXT(ctx);
+	int i;
+
+	if (RADEON_DEBUG & DEBUG_STATE)
+		fprintf(stderr, "%s\n", __FUNCTION__);
+
+	/* We only support rendering in hardware for now */
+	if (ctx->RenderMode != GL_RENDER) {
+		stage->active = GL_FALSE;
+		return;
+	}
+	if((r300->current_vp != NULL) && ctx->VertexProgram._Enabled) {
+		stage->active = GL_TRUE;
+		stage->inputs = ctx->VertexProgram.Current->InputsRead;
+	} else {
+		stage->active = GL_FALSE;
+	}
+}
+
+const struct tnl_pipeline_stage _r300_tcl_stage = {
+	"r300 tcl",
+	_NEW_ALL,		/* re-check (always re-check for now) */
+	0,			/* re-run (always runs) */
+	GL_TRUE,		/* active */
+	0, 0,			/* inputs (set in check_render), outputs */
+	0, 0,			/* changed_inputs, private */
+	dtr,			/* destructor */
+	r300_check_tcl_render,	/* check */
+	r300_run_tcl_render	/* run */
+};
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 716f62346a..c10e5dbf96 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1435,7 +1435,7 @@ void r300_setup_rs_unit(GLcontext *ctx)
 	cur_reg = 0;
 	r300->hw.rr.cmd[R300_RR_ROUTE_0] = 0;
 
-	if (r300->current_vp != NULL)
+	if (r300->current_vp != NULL && ctx->VertexProgram._Enabled)
 		vap_outputs = r300->current_vp->outputs;
 	else
 		vap_outputs = r300->state.render_inputs;
@@ -1693,7 +1693,7 @@ void r300SetupVertexShader(r300ContextPtr rmesa)
 	   0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
 	   0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
 	//setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
-	if(rmesa->current_vp != NULL){
+	if(rmesa->current_vp != NULL && ctx->VertexProgram._Enabled){
 		r300SetupVertexProgram(rmesa);
 		return ;
 	}