diff options
| author | Andre Maasikas <amaasikas@gmail.com> | 2009-12-22 14:50:10 +0200 |
|---|---|---|
| committer | Andre Maasikas <amaasikas@gmail.com> | 2010-01-05 15:36:32 +0200 |
| commit | c91ceeec320daebe7d9d78ed2d80a2265bcfa8c2 (patch) | |
| tree | 44432bd04e060d22fa31f3c89a340d7206f9c4d9 /src/mesa/drivers/dri/r600/r600_texstate.c | |
| parent | 750c1e7bb4b5caab699d8bce8906b5ca138eac51 (diff) | |
r600: adjust after radeon mipmap changes in 7118db8700
R600_OUT_BATCH_RELOC doesn't really use offset so set it
in TEX_RESOURCE2
+ typo fix
Diffstat (limited to 'src/mesa/drivers/dri/r600/r600_texstate.c')
| -rw-r--r-- | src/mesa/drivers/dri/r600/r600_texstate.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c index 937f127e7c..ae252c995b 100644 --- a/src/mesa/drivers/dri/r600/r600_texstate.c +++ b/src/mesa/drivers/dri/r600/r600_texstate.c @@ -91,7 +91,7 @@ static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask); SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, - FORMAT_COMP_X_shift, FORMAT_COMP_Z_mask); + FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask); SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED, FORMAT_COMP_W_shift, FORMAT_COMP_W_mask); @@ -731,8 +731,10 @@ static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *tex SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1, TEX_HEIGHT_shift, TEX_HEIGHT_mask); + t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256; + if ((t->maxLod - t->minLod) > 0) { - t->SQ_TEX_RESOURCE3 = t->mt->levels[t->minLod].size / 256; + t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256; SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask); SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask); } |