radeon: properly calculate rowstride for tiled images

1 files changed, 9 insertions, 5 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 8c1f96ede0..ee91f30be5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -105,17 +105,21 @@ static unsigned is_pot(unsigned value)
 	return value == m;
 }
 
-unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width)
+unsigned get_texture_image_row_stride(radeonContextPtr rmesa, gl_format format, unsigned width, unsigned tiling)
 {
 	if (_mesa_is_format_compressed(format)) {
 		return get_aligned_compressed_row_stride(format, width, rmesa->texture_compressed_row_align);
 	} else {
 		unsigned row_align;
 
-		if (is_pot(width)) {
-			row_align = rmesa->texture_row_align - 1;
-		} else {
+		if (!is_pot(width)) {
 			row_align = rmesa->texture_rect_row_align - 1;
+		} else if (tiling) {
+			unsigned tileWidth, tileHeight;
+			get_tile_size(format, &tileWidth, &tileHeight);
+			row_align = tileWidth * _mesa_get_format_bytes(format) - 1;
+		} else {
+			row_align = rmesa->texture_row_align - 1;
 		}
 
 		return (_mesa_format_row_stride(format, width) + row_align) & ~row_align;
@@ -137,7 +141,7 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree
 
 	height = _mesa_next_pow_two_32(lvl->height);
 
-	lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width);
+	lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits);
 	lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, lvl->height, lvl->depth, mt->tilebits);
 
 	assert(lvl->size > 0);