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authorPauli Nieminen <suokkos@gmail.com>2009-08-29 00:46:08 +0300
committerPauli Nieminen <suokkos@gmail.com>2009-08-29 00:46:57 +0300
commit0926a5f4a110926711d0f8a4eb297dc772b09aa2 (patch)
treee2683648e298c0524d1640c5bea56660f8eeff0a /src/mesa/drivers/dri/radeon/radeon_swtcl.c
parent55e7abf81f3c515919ef8ff69125c7aafd274716 (diff)
radeon: Fix swtcl emit pediction.
Problem was to find the correct place to run prediction. Only place that is called for every primitive is ALLOC_VERTS so we have to do prediction there before allocation.
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_swtcl.c')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_swtcl.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 7358e22255..32df569257 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -220,9 +220,8 @@ static void radeonSetVertexFormat( GLcontext *ctx )
}
}
-static void radeon_predict_emit_size( GLcontext* ctx )
+static void radeon_predict_emit_size( r100ContextPtr rmesa )
{
- r100ContextPtr rmesa = R100_CONTEXT( ctx );
if (!rmesa->radeon.swtcl.emit_prediction) {
const int state_size = radeonCountStateEmitSize( &rmesa->radeon );
@@ -251,7 +250,6 @@ static void radeonRenderStart( GLcontext *ctx )
if (rmesa->radeon.dma.flush != 0 &&
rmesa->radeon.dma.flush != rcommon_flush_last_swtcl_prim)
rmesa->radeon.dma.flush( ctx );
- radeon_predict_emit_size( ctx );
}
@@ -324,7 +322,6 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
" We might overflow command buffer.\n",
rmesa->radeon.cmdbuf.cs->cdw - rmesa->radeon.swtcl.emit_prediction );
- radeon_predict_emit_size( ctx );
rmesa->radeon.swtcl.emit_prediction = 0;
@@ -369,6 +366,16 @@ radeonDmaPrimitive( r100ContextPtr rmesa, GLenum prim )
// assert(rmesa->radeon.dma.current.ptr == rmesa->radeon.dma.current.start);
}
+static void* radeon_alloc_verts( r100ContextPtr rmesa , GLuint nr, GLuint size )
+{
+ void *rv;
+ do {
+ radeon_predict_emit_size( rmesa );
+ rv = rcommonAllocDmaLowVerts( &rmesa->radeon, nr, size );
+ } while (!rv);
+ return rv;
+}
+
#define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
#define INIT( prim ) radeonDmaPrimitive( rmesa, prim )
#define FLUSH() RADEON_NEWPRIM( rmesa )
@@ -376,8 +383,7 @@ radeonDmaPrimitive( r100ContextPtr rmesa, GLenum prim )
// (((int)rmesa->radeon.dma.current.end - (int)rmesa->radeon.dma.current.ptr) / (rmesa->radeon.swtcl.vertex_size*4))
#define GET_SUBSEQUENT_VB_MAX_VERTS() \
((RADEON_BUFFER_SIZE) / (rmesa->radeon.swtcl.vertex_size*4))
-#define ALLOC_VERTS( nr ) \
- rcommonAllocDmaLowVerts( &rmesa->radeon, nr, rmesa->radeon.swtcl.vertex_size * 4 )
+#define ALLOC_VERTS( nr ) radeon_alloc_verts( rmesa, nr, rmesa->radeon.swtcl.vertex_size * 4 )
#define EMIT_VERTS( ctx, j, nr, buf ) \
_tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf)
@@ -470,7 +476,7 @@ static void radeonResetLineStipple( GLcontext *ctx );
#undef ALLOC_VERTS
#define CTX_ARG r100ContextPtr rmesa
#define GET_VERTEX_DWORDS() rmesa->radeon.swtcl.vertex_size
-#define ALLOC_VERTS( n, size ) rcommonAllocDmaLowVerts( &rmesa->radeon, n, (size) * 4 )
+#define ALLOC_VERTS( n, size ) radeon_alloc_verts( rmesa, n, (size) * 4 )
#undef LOCAL_VARS
#define LOCAL_VARS \
r100ContextPtr rmesa = R100_CONTEXT(ctx); \