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authorMaciej Cencora <m.cencora@gmail.com>2009-11-17 19:46:37 +0100
committerMaciej Cencora <m.cencora@gmail.com>2009-11-17 19:46:37 +0100
commit93eb2ab8c395f81e40fa298d78805bb2c777f891 (patch)
tree1f63cb33c3069264808bf16dab4cada594ab7f92 /src/mesa/drivers/dri/radeon/radeon_tex.c
parentad83aeccdc54beecf25f217e2dd24c8edf6d6767 (diff)
radeon: align for mipmap tree changes
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_tex.c')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex.c18
1 files changed, 3 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 60981aada2..749ab75f20 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -348,17 +348,7 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
case GL_TEXTURE_MAX_LEVEL:
case GL_TEXTURE_MIN_LOD:
case GL_TEXTURE_MAX_LOD:
-
- /* This isn't the most efficient solution but there doesn't appear to
- * be a nice alternative. Since there's no LOD clamping,
- * we just have to rely on loading the right subset of mipmap levels
- * to simulate a clamped LOD.
- */
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- t->validated = GL_FALSE;
- }
+ t->validated = GL_FALSE;
break;
default:
@@ -388,10 +378,8 @@ static void radeonDeleteTexture( GLcontext *ctx,
}
}
- if (t->mt) {
- radeon_miptree_unreference(t->mt);
- t->mt = 0;
- }
+ radeon_miptree_unreference(&t->mt);
+
/* Free mipmap images and the texture object itself */
_mesa_delete_texture_object(ctx, texObj);
}