radeon/r200/r300: fix warnings

8 files changed, 15 insertions, 26 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 5b23473ab3..9964de7c7c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -36,6 +36,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xmlpool.h"		/* for symbolic values of enum-type options */
 #include "utils.h"
 #include "vblank.h"
+#include "drirenderbuffer.h"
 #include "main/state.h"
 
 #define DRIVER_DATE "20090101"
@@ -398,7 +399,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 	struct radeon_framebuffer *draw;
 	radeonContextPtr radeon;
 	char *regname;
-	struct radeon_bo *depth_bo, *bo;
+	struct radeon_bo *depth_bo = NULL, *bo;
 
 	if (RADEON_DEBUG & DEBUG_DRI)
 	    fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 40945855d9..96ba5d3c60 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -510,8 +510,9 @@ radeon_render_texture(GLcontext * ctx,
                                             att->TextureLevel);
 
    if (att->Texture->Target == GL_TEXTURE_3D) {
-      const GLuint *offsets = radeon_miptree_depth_offsets(radeon_image->mt,
-                                                          att->TextureLevel);
+      GLuint offsets[6];
+      radeon_miptree_depth_offsets(radeon_image->mt, att->TextureLevel,
+				   offsets);
       imageOffset += offsets[att->Zoffset];
    }
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c
index e1bb2cd6e2..fe19218d7a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_lock.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lock.c
@@ -61,7 +61,6 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags)
 	__DRIdrawablePrivate *const drawable = rmesa->dri.drawable;
 	__DRIdrawablePrivate *const readable = rmesa->dri.readable;
 	__DRIscreenPrivate *sPriv = rmesa->dri.screen;
-	drm_radeon_sarea_t *sarea = rmesa->sarea;
 
 	assert(drawable != NULL);
 
@@ -92,7 +91,6 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags)
 
 void radeon_lock_hardware(radeonContextPtr radeon)
 {
-	__DRIdrawable *dPriv = radeon->dri.drawable;
 	char ret = 0;
 	struct radeon_framebuffer *rfb = NULL;
 	struct radeon_renderbuffer *rrb = NULL;
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 228629e3c4..34d6261706 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -94,8 +94,6 @@ static void compute_tex_image_offset(radeon_mipmap_tree *mt,
 	/* Find image size in bytes */
 	if (mt->compressed) {
 		/* TODO: Is this correct? Need test cases for compressed textures! */
-		GLuint align;
-
 		lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
 		lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
 							   lvl->width, lvl->height, lvl->depth, mt->compressed);
@@ -365,14 +363,16 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
  *
  * These functions present that view to mesa:
  */
-const GLuint *
-radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level)
+void
+radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
 {
-     static const GLuint zero = 0;
      if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
-       return &zero;
-     else
-       return mt->levels[level].faces[0].offset;
+        offsets[0] = 0;
+     else {
+	int i;
+	for (i = 0; i < 6; i++)
+		offsets[i] = mt->levels[level].faces[i].offset;
+     }
 }
 
 GLuint
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index d9ad5ad39a..697010bc02 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -94,6 +94,5 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
 			      struct gl_texture_image *texImage, GLuint face, GLuint level);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
 				   GLuint face, GLuint level);
-const GLuint *
-radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level);
+void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
 #endif /* __RADEON_MIPMAP_TREE_H_ */
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 3d2c5da4c0..0b4eaae02b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -377,7 +377,7 @@ do {									\
 #include "stenciltmp.h"
 
 
-void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
+static void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
 {
 	struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb);
 	int r;
@@ -403,7 +403,6 @@ void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
 static void
 radeon_map_unmap_buffers(GLcontext *ctx, GLboolean map)
 {
-	radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 	GLuint i, j;
 
 	/* color draw buffers */
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index af933a35f2..2484006f1c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -825,6 +825,4 @@ void radeonInitSwtcl( GLcontext *ctx )
 
 void radeonDestroySwtcl( GLcontext *ctx )
 {
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-
 }
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 78e2a08559..9931f01b63 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -775,11 +775,6 @@ void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPri
 static void disable_tex_obj_state( r100ContextPtr rmesa, 
 				   int unit )
 {
-   /* do not use RADEON_DB_STATE to avoid stale texture caches */
-   uint32_t *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0];
-   GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
-   GLuint *txr_cmd = RADEON_DB_STATE( txr[unit] );
-
    RADEON_STATECHANGE( rmesa, tex[unit] );
 
    RADEON_STATECHANGE( rmesa, tcl );
@@ -1142,8 +1137,6 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
 static GLboolean radeonUpdateTextureUnit( GLcontext *ctx, int unit )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-
 
    if (ctx->Texture.Unit[unit]._ReallyEnabled & TEXTURE_3D_BIT) {
      return GL_FALSE;