summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/radeon
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2009-02-17 10:34:01 +1000
committerDave Airlie <airlied@redhat.com>2009-02-17 10:41:21 +1000
commit62d504d818f1ab1836a134658b1661ceabb65f1f (patch)
tree7c37e93c46dbb568c2e30671c678582a66a85afc /src/mesa/drivers/dri/radeon
parenta365f9b78bb493a5202c9a4985de40979ed42038 (diff)
radeon/r200: drop dirty state from texture object + pp_txoffset
this is just more code cleanup for old dead code
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h20
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state_init.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texstate.c13
4 files changed, 6 insertions, 33 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index c9be104578..7618b3482f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -170,7 +170,6 @@ typedef struct radeon_tex_obj radeonTexObj, *radeonTexObjPtr;
/* Texture object in locally shared texture space.
*/
struct radeon_tex_obj {
- // driTextureObject base;
struct gl_texture_object base;
struct _radeon_mipmap_tree *mt;
@@ -185,26 +184,9 @@ struct radeon_tex_obj {
GLuint tile_bits; /* hw texture tile bits used on this texture */
struct radeon_bo *bo;
- GLuint bufAddr; /* Offset to start of locally
- shared texture block */
-
- GLuint dirty_state; /* Flags (1 per texunit) for
- whether or not this texobj
- has dirty hardware state
- (pp_*) that needs to be
- brought into the
- texunit. */
-
- drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
- /* Six, for the cube faces */
-
-
-
GLuint pp_txfilter; /* hardware register values */
GLuint pp_txformat;
- GLuint pp_txformat_x;
- GLuint pp_txoffset; /* Image location in texmem.
- All cube faces follow. */
+ GLuint pp_txformat_x;
GLuint pp_txsize; /* npot only */
GLuint pp_txpitch; /* npot only */
GLuint pp_border_color;
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 998ae79624..617e731a41 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -486,7 +486,7 @@ static void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom)
OUT_BATCH(r100->radeon.radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]);
// OUT_BATCH(r100->radeon.radeonScreen);
} else if (t->image_override)
- OUT_BATCH(atom->cmd[4]);
+ OUT_BATCH(t->override_offset);
OUT_BATCH_TABLE((atom->cmd+4), 5);
END_BATCH();
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 4d98b72612..2dfb5042ec 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -362,10 +362,6 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
default:
return;
}
-
- /* Mark this texobj as dirty (one bit per tex unit)
- */
- t->dirty_state = R100_TEX_ALL;
}
static void radeonDeleteTexture( GLcontext *ctx,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 2aa1a83342..6a34f1e332 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -614,8 +614,9 @@ void radeonSetTexOffset(__DRIcontext * pDRICtx, GLint texname,
if (!offset)
return;
-
- t->pp_txoffset = offset;
+
+ t->bo = NULL;
+ t->override_offset = offset;
t->pp_txpitch = pitch - 32;
switch (depth) {
@@ -715,7 +716,6 @@ static void import_tex_obj_state( r100ContextPtr rmesa,
cmd[TEX_PP_TXFILTER] |= texobj->pp_txfilter & TEXOBJ_TXFILTER_MASK;
cmd[TEX_PP_TXFORMAT] &= ~TEXOBJ_TXFORMAT_MASK;
cmd[TEX_PP_TXFORMAT] |= texobj->pp_txformat & TEXOBJ_TXFORMAT_MASK;
- cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset;
cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color;
if (texobj->base.Target == GL_TEXTURE_RECTANGLE_NV) {
@@ -742,8 +742,6 @@ static void import_tex_obj_state( r100ContextPtr rmesa,
rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;
}
- texobj->dirty_state &= ~(1<<unit);
-
rmesa->radeon.NewGLState |= _NEW_TEXTURE_MATRIX;
}
@@ -974,7 +972,6 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
t->pp_txformat |= RADEON_TXFORMAT_NON_POWER2;
}
- t->dirty_state = R100_TEX_ALL;
return GL_TRUE;
}
@@ -1004,9 +1001,7 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
rmesa->recheck_texgen[unit] = GL_TRUE;
- if (t->dirty_state & (1<<unit)) {
- import_tex_obj_state( rmesa, unit, t );
- }
+ import_tex_obj_state( rmesa, unit, t );
if (rmesa->recheck_texgen[unit]) {
GLboolean fallback = !radeon_validate_texgen( ctx, unit );