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| author | Jerome Glisse <glisse@freedesktop.org> | 2009-07-21 21:12:40 +0200 |
|---|---|---|
| committer | Jerome Glisse <glisse@freedesktop.org> | 2009-07-21 21:14:19 +0200 |
| commit | 7247446ba81b6bafede9ead750e5b5e81f3f1a10 (patch) | |
| tree | d54a45908cba03f657b7ddbde3eab46777d16653 /src/mesa/drivers/dri/radeon | |
| parent | ecead301112ad24f5ddb1616c99cde67930751a3 (diff) | |
radeon: fix colorbuffer pitch emission regarding tiling in KMS/CS case
We need to emit a relocation for pitch register so that kernel can
check and properly setup tiling on the color buffer.
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
| -rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_state_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index aaa82b1d6a..57aa7f1ca4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -423,7 +423,7 @@ static void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) if (drb) dwords += 6; if (rrb) - dwords += 6; + dwords += 8; BEGIN_BATCH_NO_AUTOSTATE(dwords); /* In the CS case we need to split this up */ @@ -449,7 +449,7 @@ static void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom) OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0)); - OUT_BATCH(cbpitch); + OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0); } // if (atom->cmd_size == CTX_STATE_SIZE_NEWDRM) { |