radeon: fix r100/r200 polygon stipple under kms

There really need to use state emits under kms, otherwise
we end up with some dwords in the command buffer before we've
ever emitted any useful state.

Signed-off-by: Dave Airlie <airlied@redhat.com>

5 files changed, 31 insertions, 28 deletions

diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index aaa5165bc8..1836dbc79a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -312,31 +312,6 @@ void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
    UNLOCK_HARDWARE( radeon );
 }
 
-void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
-{
-   radeonContextPtr radeon = RADEON_CONTEXT(ctx);
-   GLint i;
-   BATCH_LOCALS(radeon);
-
-   radeon_firevertices(radeon);
-
-   BEGIN_BATCH_NO_AUTOSTATE(35);
-
-   OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0));
-   OUT_BATCH(0x00000000);
-
-   OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31));
-
-   /* Must flip pattern upside down.
-    */
-   for ( i = 31 ; i >= 0; i--) {
-      OUT_BATCH(((GLuint *) mask)[i]);
-   }
-
-   END_BATCH();
-}
-
-
 
 /* ================================================================
  * SwapBuffers with client-side throttling
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index ba983e5ab6..f3201911ac 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon);
 void radeonSetCliprects(radeonContextPtr radeon);
 void radeonUpdateScissor( GLcontext *ctx );
 void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
-void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask );
 void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask );
 
 void radeonWaitForIdleLocked(radeonContextPtr radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index 572acbb006..4e2c52c835 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -299,6 +299,11 @@ struct radeon_texture_state {
 #define R100_QUERYOBJ_DATA_0 1
 #define R100_QUERYOBJ_CMDSIZE  2
 
+#define STP_CMD_0 0
+#define STP_DATA_0 1
+#define STP_CMD_1 2
+#define STP_STATE_SIZE 35
+
 struct r100_hw_state {
 	/* Hardware state, stored as cmdbuf commands:  
 	 *   -- Need to doublebuffer for
@@ -323,7 +328,7 @@ struct r100_hw_state {
 	struct radeon_state_atom fog;
 	struct radeon_state_atom glt;
 	struct radeon_state_atom txr[3];	/* for NPOT */
-
+	struct radeon_state_atom stp;
 };
 
 
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index c8cc7f9bcf..4d0d35ee0c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -2197,6 +2197,22 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
    }
 }
 
+static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
+{
+   r100ContextPtr r100 = R100_CONTEXT(ctx);
+   GLint i;
+
+   radeon_firevertices(&r100->radeon);
+
+   RADEON_STATECHANGE(r100, stp);
+
+   /* Must flip pattern upside down.
+    */
+   for ( i = 31 ; i >= 0; i--) {
+     r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i];
+   }
+}
+
 
 /* Initialize the driver's state functions.
  * Many of the ctx->Driver functions might have been initialized to
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 8236199b9b..f3ad0dd17a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -781,6 +781,10 @@ void radeonInitState( r100ContextPtr rmesa )
       ALLOC_STATE( ucp[5], tcl_ucp5, UCP_STATE_SIZE, "UCP/userclip-5", 1 );
    }
 
+   if (rmesa->radeon.radeonScreen->kernel_mm) {
+       ALLOC_STATE( stp, always, STP_STATE_SIZE, "STP/stp", 0 );
+   }
+   
    for (i = 0; i < 3; i++) {
       if (rmesa->radeon.radeonScreen->kernel_mm)
           rmesa->hw.tex[i].emit = tex_emit_cs;
@@ -873,6 +877,10 @@ void radeonInitState( r100ContextPtr rmesa )
    }
 
    if (rmesa->radeon.radeonScreen->kernel_mm) {
+      rmesa->hw.stp.cmd[STP_CMD_0] = CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0);
+      rmesa->hw.stp.cmd[STP_DATA_0] = 0;
+      rmesa->hw.stp.cmd[STP_CMD_1] = CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31);
+
       rmesa->hw.grd.emit = scl_emit;
       rmesa->hw.fog.emit = vec_emit;
       rmesa->hw.glt.emit = vec_emit;
@@ -1143,7 +1151,7 @@ void radeonInitState( r100ContextPtr rmesa )
    rmesa->hw.eye.cmd[EYE_Y] = 0;
    rmesa->hw.eye.cmd[EYE_Z] = IEEE_ONE;
    rmesa->hw.eye.cmd[EYE_RESCALE_FACTOR] = IEEE_ONE;
-   
+
    if (rmesa->radeon.radeonScreen->kernel_mm) {
       radeon_init_query_stateobj(&rmesa->radeon, R100_QUERYOBJ_CMDSIZE);
       rmesa->radeon.query.queryobj.cmd[R100_QUERYOBJ_CMD_0] = CP_PACKET0(RADEON_RB3D_ZPASS_DATA, 0);