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authorZou Nan hai <nanhai.zou@intel.com>2007-01-26 07:04:15 +0800
committerZou Nan hai <nanhai.zou@intel.com>2007-01-26 07:04:15 +0800
commit6aa62ba43f64f617c608e52b63c7eaa7aae16fb4 (patch)
tree342508a88964f7e3e5c00943fff91f36e85ec8c5 /src/mesa/drivers/dri
parent844e5610de6ffe6966072d120b50db541ea85104 (diff)
ARB_Occlusion_query should support multiple query at same time
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.c6
-rw-r--r--src/mesa/drivers/dri/i965/intel_context.h2
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index f7ab7d3b7d..3f8c2c0890 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -258,11 +258,11 @@ intelBeginQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
{
struct intel_context *intel = intel_context( ctx );
drmI830MMIO io = {
- .read_write = MMIO_WRITE,
+ .read_write = MMIO_READ,
.reg = MMIO_REGS_PS_DEPTH_COUNT,
.data = &q->Result
};
- intel->stats_wm = GL_TRUE;
+ intel->stats_wm++;
intelFinish(&intel->ctx);
drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
}
@@ -281,7 +281,7 @@ intelEndQuery(GLcontext *ctx, GLenum target, struct gl_query_object *q)
drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
q->Result = tmp - q->Result;
q->Ready = GL_TRUE;
- intel->stats_wm = GL_FALSE;
+ intel->stats_wm--;
}
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index d51536c3fe..a0f392f935 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -177,7 +177,7 @@ struct intel_context
GLuint second_last_swap_fence;
GLboolean aub_wrap;
- GLboolean stats_wm;
+ GLuint stats_wm;
struct intel_batchbuffer *batch;