diff options
author | Eric Anholt <eric@anholt.net> | 2010-08-22 00:26:09 -0700 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-08-22 00:52:18 -0700 |
commit | 556f19415a5210aacd52d652b8aae6e58c44e4ed (patch) | |
tree | 8bdd0f0bf98f06147a3634cea06795bdf2172b50 /src/mesa/drivers/dri | |
parent | 527a9a4de218cae89d7faf92788f88ce1f9387b6 (diff) |
i965: Fix up WM push constant setup on gen6.
Fixes glsl-algebraic-add-add-1.
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vtbl.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_wm_state.c | 71 |
5 files changed, 57 insertions, 26 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index cc4e6638e8..68fc8debc6 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -654,7 +654,13 @@ struct brw_context drm_intel_bo *prog_bo; drm_intel_bo *state_bo; - drm_intel_bo *const_bo; + drm_intel_bo *const_bo; /* pull constant buffer. */ + /** + * This is the push constant BO on gen6. + * + * Pre-gen6, push constants live in the CURBE. + */ + drm_intel_bo *push_const_bo; } wm; diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index af08446f2d..c5d296b129 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -107,6 +107,7 @@ extern const struct brw_tracked_state gen6_sf_vp; extern const struct brw_tracked_state gen6_urb; extern const struct brw_tracked_state gen6_viewport_state; extern const struct brw_tracked_state gen6_vs_state; +extern const struct brw_tracked_state gen6_wm_constants; extern const struct brw_tracked_state gen6_wm_state; /*********************************************************************** diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 97266124fe..f51b0719d1 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -129,7 +129,7 @@ const struct brw_tracked_state *gen6_atoms[] = &gen6_cc_state_pointers, &brw_vs_constants, /* Before vs_surfaces and constant_buffer */ - &brw_wm_constants, /* Before wm_surfaces and constant_buffer */ + &gen6_wm_constants, /* Before wm_surfaces and constant_buffer */ &brw_vs_surfaces, /* must do before unit */ &brw_wm_constant_surface, /* must do before wm surfaces/bind bo */ diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 14227a5133..8f1601d10f 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -101,6 +101,7 @@ static void brw_destroy_context( struct intel_context *intel ) dri_bo_release(&brw->wm.prog_bo); dri_bo_release(&brw->wm.state_bo); dri_bo_release(&brw->wm.const_bo); + dri_bo_release(&brw->wm.push_const_bo); dri_bo_release(&brw->cc.prog_bo); dri_bo_release(&brw->cc.state_bo); dri_bo_release(&brw->cc.vp_bo); diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c index 863c85449d..2cd640de17 100644 --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c @@ -34,18 +34,59 @@ #include "intel_batchbuffer.h" static void +prepare_wm_constants(struct brw_context *brw) +{ + struct intel_context *intel = &brw->intel; + GLcontext *ctx = &intel->ctx; + const struct brw_fragment_program *fp = + brw_fragment_program_const(brw->fragment_program); + + drm_intel_bo_unreference(brw->wm.push_const_bo); + brw->wm.push_const_bo = NULL; + + /* Updates the ParamaterValues[i] pointers for all parameters of the + * basic type of PROGRAM_STATE_VAR. + */ + /* XXX: Should this happen somewhere before to get our state flag set? */ + _mesa_load_state_parameters(ctx, fp->program.Base.Parameters); + + if (brw->wm.prog_data->nr_params != 0) { + float *constants; + unsigned int i; + + brw->wm.push_const_bo = drm_intel_bo_alloc(intel->bufmgr, + "WM constant_bo", + brw->wm.prog_data->nr_params * + sizeof(float), + 4096); + drm_intel_gem_bo_map_gtt(brw->wm.push_const_bo); + constants = brw->wm.push_const_bo->virtual; + for (i = 0; i < brw->wm.prog_data->nr_params; i++) { + constants[i] = *brw->wm.prog_data->param[i]; + } + drm_intel_gem_bo_unmap_gtt(brw->wm.push_const_bo); + } +} + +const struct brw_tracked_state gen6_wm_constants = { + .dirty = { + .mesa = _NEW_PROGRAM_CONSTANTS, + .brw = 0, + .cache = 0, + }, + .prepare = prepare_wm_constants, +}; + +static void upload_wm_state(struct brw_context *brw) { struct intel_context *intel = &brw->intel; GLcontext *ctx = &intel->ctx; const struct brw_fragment_program *fp = brw_fragment_program_const(brw->fragment_program); - unsigned int nr_params = fp->program.Base.Parameters->NumParameters; - drm_intel_bo *constant_bo; - int i; uint32_t dw2, dw4, dw5, dw6; - if (fp->use_const_buffer || nr_params == 0) { + if (fp->use_const_buffer || brw->wm.prog_data->nr_params == 0) { /* Disable the push constant buffers. */ BEGIN_BATCH(5); OUT_BATCH(CMD_3D_CONSTANT_PS_STATE << 16 | (5 - 2)); @@ -55,35 +96,17 @@ upload_wm_state(struct brw_context *brw) OUT_BATCH(0); ADVANCE_BATCH(); } else { - /* Updates the ParamaterValues[i] pointers for all parameters of the - * basic type of PROGRAM_STATE_VAR. - */ - _mesa_load_state_parameters(ctx, fp->program.Base.Parameters); - - constant_bo = drm_intel_bo_alloc(intel->bufmgr, "WM constant_bo", - nr_params * 4 * sizeof(float), - 4096); - drm_intel_gem_bo_map_gtt(constant_bo); - for (i = 0; i < nr_params; i++) { - memcpy((char *)constant_bo->virtual + i * 4 * sizeof(float), - fp->program.Base.Parameters->ParameterValues[i], - 4 * sizeof(float)); - } - drm_intel_gem_bo_unmap_gtt(constant_bo); - BEGIN_BATCH(5); OUT_BATCH(CMD_3D_CONSTANT_PS_STATE << 16 | GEN6_CONSTANT_BUFFER_0_ENABLE | (5 - 2)); - OUT_RELOC(constant_bo, + OUT_RELOC(brw->wm.push_const_bo, I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */ - ALIGN(nr_params, 2) / 2 - 1); + ALIGN(brw->wm.prog_data->nr_params, 8) / 8 - 1); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); - - drm_intel_bo_unreference(constant_bo); } intel_batchbuffer_emit_mi_flush(intel->batch); |