diff options
| author | Xiang, Haihao <haihao.xiang@intel.com> | 2007-11-30 11:50:08 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2007-11-30 11:50:08 +0800 |
| commit | 6bc1d3856712f5298d9ecd55807025ebd5344660 (patch) | |
| tree | 323f6f97a62da15dd1e02ecc137e6dbc8c7ac55d /src/mesa/drivers/dri | |
| parent | 1df7a82688c4f41b06ef04d997654afb4e05071b (diff) | |
i965: use uncompressed instruction to ensure only
Pixel Mask Copy is modified as the pixel shader thread
turns off pixels based on kill instructions.
Diffstat (limited to 'src/mesa/drivers/dri')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 1f7158f7a7..6bafa44b82 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -810,6 +810,7 @@ static void emit_kil( struct brw_wm_compile *c, brw_push_insn_state(p); brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], brw_imm_f(0)); brw_set_predicate_control_flag_value(p, 0xff); + brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_AND(p, r0uw, brw_flag_reg(), r0uw); brw_pop_insn_state(p); } |