summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri
diff options
context:
space:
mode:
authorMichal Krol <michal@vmware.com>2010-01-05 11:04:50 +0100
committerMichal Krol <michal@vmware.com>2010-01-05 11:04:50 +0100
commit9b21b3c52a8a7d58d08151d1a6bf25c472dec213 (patch)
treed9083b6af4e2e9b70a7fa6cd31bac45a36e0f6b6 /src/mesa/drivers/dri
parent543b9566bdaa48fea2df1866fa1310c1cdbcde27 (diff)
parent1f9aa38f4e2be47229d92be2c1189c2b8d9c7133 (diff)
Merge branch 'master' into instanced-arrays
Conflicts: src/gallium/auxiliary/tgsi/tgsi_dump.c src/gallium/include/pipe/p_shader_tokens.h
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/ffb/ffb_tris.c2
-rw-r--r--src/mesa/drivers/dri/gamma/gamma_state.c8
-rw-r--r--src/mesa/drivers/dri/gamma/gamma_tex.c4
-rw-r--r--src/mesa/drivers/dri/i810/i810tex.c4
-rw-r--r--src/mesa/drivers/dri/i810/i810tex.h1
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c8
-rw-r--r--src/mesa/drivers/dri/i915/i915_program.c2
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c15
-rw-r--r--src/mesa/drivers/dri/i915/intel_render.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_disasm.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_sampler_state.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c51
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_clear.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h8
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c24
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_copy.c8
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c7
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_state.c8
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_tex.c4
-rw-r--r--src/mesa/drivers/dri/mga/mgapixel.c24
-rw-r--r--src/mesa/drivers/dri/mga/mgastate.c10
-rw-r--r--src/mesa/drivers/dri/mga/mgatex.c4
-rw-r--r--src/mesa/drivers/dri/r128/r128_state.c8
-rw-r--r--src/mesa/drivers/dri/r128/r128_tex.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_pixel.c16
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.c8
-rw-r--r--src/mesa/drivers/dri/r200/r200_tex.c4
-rw-r--r--src/mesa/drivers/dri/r300/compiler/memory_pool.c4
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_code.c3
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_compiler.c11
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c30
-rw-r--r--src/mesa/drivers/dri/r300/r300_state.c7
-rw-r--r--src/mesa/drivers/dri/r300/r300_tex.c4
-rw-r--r--src/mesa/drivers/dri/r600/r600_context.h1
-rw-r--r--src/mesa/drivers/dri/r600/r600_tex.c4
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c20
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.h1
-rw-r--r--src/mesa/drivers/dri/r600/r700_clear.c2
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c8
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.c8
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.h1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex.c4
-rw-r--r--src/mesa/drivers/dri/savage/savageioctl.c14
-rw-r--r--src/mesa/drivers/dri/savage/savagetex.c4
-rw-r--r--src/mesa/drivers/dri/sis/sis_context.c2
-rw-r--r--src/mesa/drivers/dri/sis/sis_texstate.c8
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_pixels.c8
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_render.c6
-rw-r--r--src/mesa/drivers/dri/tdfx/tdfx_tex.c2
-rw-r--r--src/mesa/drivers/dri/unichrome/via_state.c26
60 files changed, 264 insertions, 214 deletions
diff --git a/src/mesa/drivers/dri/ffb/ffb_tris.c b/src/mesa/drivers/dri/ffb/ffb_tris.c
index d785c15718..e7dd960ba1 100644
--- a/src/mesa/drivers/dri/ffb/ffb_tris.c
+++ b/src/mesa/drivers/dri/ffb/ffb_tris.c
@@ -352,7 +352,7 @@ static struct {
#define LOCAL_VARS(n) \
ffbContextPtr fmesa = FFB_CONTEXT(ctx); \
__DRIdrawablePrivate *dPriv = fmesa->driDrawable; \
- ffb_color color[n]; \
+ ffb_color color[n] = { { 0 } }; \
(void) color; (void) dPriv;
/***********************************************************************
diff --git a/src/mesa/drivers/dri/gamma/gamma_state.c b/src/mesa/drivers/dri/gamma/gamma_state.c
index 59272f9bc9..bdd1c86ab7 100644
--- a/src/mesa/drivers/dri/gamma/gamma_state.c
+++ b/src/mesa/drivers/dri/gamma/gamma_state.c
@@ -813,10 +813,10 @@ static void gammaUpdateMasks( GLcontext *ctx )
GLuint mask = gammaPackColor( gmesa->gammaScreen->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP] );
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP] );
if (gmesa->gammaScreen->cpp == 2) mask |= mask << 16;
diff --git a/src/mesa/drivers/dri/gamma/gamma_tex.c b/src/mesa/drivers/dri/gamma/gamma_tex.c
index 0dad250e4d..694e5eba5b 100644
--- a/src/mesa/drivers/dri/gamma/gamma_tex.c
+++ b/src/mesa/drivers/dri/gamma/gamma_tex.c
@@ -145,7 +145,7 @@ static void gammaTexParameter( GLcontext *ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- gammaSetTexBorderColor( gmesa, t, tObj->BorderColor );
+ gammaSetTexBorderColor( gmesa, t, tObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
@@ -349,7 +349,7 @@ static void gammaBindTexture( GLcontext *ctx, GLenum target,
gammaSetTexWrapping( t, tObj->WrapS, tObj->WrapT );
gammaSetTexFilter( gmesa, t, tObj->MinFilter, tObj->MagFilter, bias );
- gammaSetTexBorderColor( gmesa, t, tObj->BorderColor );
+ gammaSetTexBorderColor( gmesa, t, tObj->BorderColor.f );
}
}
diff --git a/src/mesa/drivers/dri/i810/i810tex.c b/src/mesa/drivers/dri/i810/i810tex.c
index 2f6978f5aa..e764644a6c 100644
--- a/src/mesa/drivers/dri/i810/i810tex.c
+++ b/src/mesa/drivers/dri/i810/i810tex.c
@@ -210,7 +210,7 @@ i810AllocTexObj( GLcontext *ctx, struct gl_texture_object *texObj )
i810SetTexWrapping( t, texObj->WrapS, texObj->WrapT );
/*i830SetTexMaxAnisotropy( t, texObj->MaxAnisotropy );*/
i810SetTexFilter( imesa, t, texObj->MinFilter, texObj->MagFilter, bias );
- i810SetTexBorderColor( t, texObj->BorderColor );
+ i810SetTexBorderColor( t, texObj->BorderColor.f );
}
return t;
@@ -251,7 +251,7 @@ static void i810TexParameter( GLcontext *ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- i810SetTexBorderColor( t, tObj->BorderColor );
+ i810SetTexBorderColor( t, tObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
diff --git a/src/mesa/drivers/dri/i810/i810tex.h b/src/mesa/drivers/dri/i810/i810tex.h
index d980927030..28958dcb4b 100644
--- a/src/mesa/drivers/dri/i810/i810tex.h
+++ b/src/mesa/drivers/dri/i810/i810tex.h
@@ -29,7 +29,6 @@
#include "main/mtypes.h"
#include "main/mm.h"
-#include "i810context.h"
#include "i810_3d_reg.h"
#include "texmem.h"
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 27c5aa1e08..7525f9f2e0 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -304,10 +304,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
}
/* convert border color from float to ubyte */
- CLAMPED_FLOAT_TO_UBYTE(border[0], tObj->BorderColor[0]);
- CLAMPED_FLOAT_TO_UBYTE(border[1], tObj->BorderColor[1]);
- CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);
- CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]);
+ CLAMPED_FLOAT_TO_UBYTE(border[0], tObj->BorderColor.f[0]);
+ CLAMPED_FLOAT_TO_UBYTE(border[1], tObj->BorderColor.f[1]);
+ CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor.f[2]);
+ CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor.f[3]);
state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3],
border[0],
diff --git a/src/mesa/drivers/dri/i915/i915_program.c b/src/mesa/drivers/dri/i915/i915_program.c
index e7908bd48f..3902c69097 100644
--- a/src/mesa/drivers/dri/i915/i915_program.c
+++ b/src/mesa/drivers/dri/i915/i915_program.c
@@ -245,7 +245,7 @@ GLuint i915_emit_texld( struct i915_fragment_program *p,
}
else {
assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
- assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
+ assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
/* Can't use unsaved temps for coords, as the phase boundary would result
* in the contents becoming undefined.
*/
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 221bf03332..3ee4c8653a 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -197,10 +197,11 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
state[I915_TEXREG_MS3] |= MS3_TILE_WALK;
}
- /* We get one field with fraction bits to cover the maximum addressable (smallest
- * resolution) LOD. Use it to cover both MAX_LEVEL and MAX_LOD.
+ /* We get one field with fraction bits for the maximum addressable
+ * (lowest resolution) LOD. Use it to cover both MAX_LEVEL and
+ * MAX_LOD.
*/
- maxlod = MIN2(tObj->MaxLod, tObj->MaxLevel - tObj->BaseLevel);
+ maxlod = MIN2(tObj->MaxLod, tObj->_MaxLevel - tObj->BaseLevel);
state[I915_TEXREG_MS4] =
((((pitch / 4) - 1) << MS4_PITCH_SHIFT) |
MS4_CUBE_FACE_ENA_MASK |
@@ -347,10 +348,10 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
}
/* convert border color from float to ubyte */
- CLAMPED_FLOAT_TO_UBYTE(border[0], tObj->BorderColor[0]);
- CLAMPED_FLOAT_TO_UBYTE(border[1], tObj->BorderColor[1]);
- CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);
- CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]);
+ CLAMPED_FLOAT_TO_UBYTE(border[0], tObj->BorderColor.f[0]);
+ CLAMPED_FLOAT_TO_UBYTE(border[1], tObj->BorderColor.f[1]);
+ CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor.f[2]);
+ CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor.f[3]);
if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
/* GL specs that border color for depth textures is taken from the
diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c
index 410052b3c2..ec209391ab 100644
--- a/src/mesa/drivers/dri/i915/intel_render.c
+++ b/src/mesa/drivers/dri/i915/intel_render.c
@@ -117,7 +117,7 @@ intelDmaPrimitive(struct intel_context *intel, GLenum prim)
intel_set_prim(intel, hw_prim[prim]);
}
-static inline GLuint intel_get_vb_max(struct intel_context *intel)
+static INLINE GLuint intel_get_vb_max(struct intel_context *intel)
{
GLuint ret;
@@ -129,7 +129,7 @@ static inline GLuint intel_get_vb_max(struct intel_context *intel)
return ret;
}
-static inline GLuint intel_get_current_max(struct intel_context *intel)
+static INLINE GLuint intel_get_current_max(struct intel_context *intel)
{
if (intel->intelScreen->no_vbo)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 9fef230507..a8f6b993ac 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -239,7 +239,7 @@ char *imm_encoding[8] = {
[2] = "UW",
[3] = "W",
[5] = "VF",
- [5] = "V",
+ [6] = "V",
[7] = "F"
};
@@ -365,6 +365,7 @@ static int format (FILE *f, char *format, ...)
va_start (args, format);
vsnprintf (buf, sizeof (buf) - 1, format, args);
+ va_end (args);
string (f, buf);
return 0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 3413c96928..8d6ac00839 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -199,7 +199,7 @@ void brw_set_src1( struct brw_instruction *insn,
* in the future:
*/
assert (reg.address_mode == BRW_ADDRESS_DIRECT);
- //assert (reg.file == BRW_GENERAL_REGISTER_FILE);
+ /* assert (reg.file == BRW_GENERAL_REGISTER_FILE); */
if (insn->header.access_mode == BRW_ALIGN_1) {
insn->bits3.da1.src1_subreg_nr = reg.subnr;
@@ -862,7 +862,7 @@ void brw_land_fwd_jump(struct brw_compile *p,
jmpi = 2;
assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI);
- assert(jmp_insn->bits1.da1.src1_reg_file = BRW_IMMEDIATE_VALUE);
+ assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE);
jmp_insn->bits3.ud = jmpi * ((landing - jmp_insn) - 1);
}
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index b129b1f1c3..14d5319796 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -35,7 +35,7 @@
#include "brw_context.h"
-static inline void
+static INLINE void
brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
{
assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 7811689d6a..cc1052f757 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1086,7 +1086,7 @@ static void emit_kil_nv( struct brw_wm_compile *c )
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE);
- brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+ brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); /* IMASK */
brw_AND(p, r0uw, c->emit_mask_reg, r0uw);
brw_pop_insn_state(p);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index f294387c80..fde83eea62 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -743,7 +743,7 @@ static void emit_kil(struct brw_wm_compile *c)
struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE);
- brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+ brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); /* IMASK */
brw_AND(p, depth, c->emit_mask_reg, depth);
brw_pop_insn_state(p);
}
@@ -1877,10 +1877,6 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
else
brw_set_conditionalmod(p, BRW_CONDITIONAL_NONE);
- dst_flags = inst->DstReg.WriteMask;
- if (inst->SaturateMode == SATURATE_ZERO_ONE)
- dst_flags |= SATURATE;
-
switch (inst->Opcode) {
case WM_PIXELXY:
emit_pixel_xy(c, dst, dst_flags);
@@ -2044,6 +2040,7 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if_inst[if_depth++] = brw_IF(p, BRW_EXECUTE_8);
break;
case OPCODE_ELSE:
+ assert(if_depth > 0);
if_inst[if_depth-1] = brw_ELSE(p, if_inst[if_depth-1]);
break;
case OPCODE_ENDIF:
@@ -2099,7 +2096,8 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if (intel->is_ironlake)
br = 2;
-
+
+ assert(loop_depth > 0);
loop_depth--;
inst0 = inst1 = brw_WHILE(p, loop_inst[loop_depth]);
/* patch all the BREAK/CONT instructions from last BGNLOOP */
diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
index aa2e519588..ad267a4e6a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
@@ -262,10 +262,10 @@ brw_wm_sampler_populate_key(struct brw_context *brw,
dri_bo_unreference(brw->wm.sdc_bo[unit]);
if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
float bordercolor[4] = {
- texObj->BorderColor[0],
- texObj->BorderColor[0],
- texObj->BorderColor[0],
- texObj->BorderColor[0]
+ texObj->BorderColor.f[0],
+ texObj->BorderColor.f[0],
+ texObj->BorderColor.f[0],
+ texObj->BorderColor.f[0]
};
/* GL specs that border color for depth textures is taken from the
* R channel, while the hardware uses A. Spam R into all the
@@ -274,7 +274,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw,
brw->wm.sdc_bo[unit] = upload_default_color(brw, bordercolor);
} else {
brw->wm.sdc_bo[unit] = upload_default_color(brw,
- texObj->BorderColor);
+ texObj->BorderColor.f);
}
key->sampler_count = unit + 1;
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 8810f2a380..9db434c596 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -522,7 +522,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
GLubyte color_mask[4];
GLboolean color_blend;
uint32_t tiling;
- uint32_t draw_offset;
+ uint32_t draw_x;
+ uint32_t draw_y;
} key;
memset(&key, 0, sizeof(key));
@@ -564,7 +565,8 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
}
key.pitch = region->pitch;
key.cpp = region->cpp;
- key.draw_offset = region->draw_offset; /* cur 3d or cube face offset */
+ key.draw_x = region->draw_x;
+ key.draw_y = region->draw_y;
} else {
key.surface_type = BRW_SURFACE_NULL;
key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
@@ -572,10 +574,11 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
key.width = 1;
key.height = 1;
key.cpp = 4;
- key.draw_offset = 0;
+ key.draw_x = 0;
+ key.draw_y = 0;
}
/* _NEW_COLOR */
- memcpy(key.color_mask, ctx->Color.ColorMask,
+ memcpy(key.color_mask, ctx->Color.ColorMask[0],
sizeof(key.color_mask));
/* As mentioned above, disable writes to the alpha component when the
@@ -602,26 +605,32 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
surf.ss0.surface_format = key.surface_format;
surf.ss0.surface_type = key.surface_type;
if (key.tiling == I915_TILING_NONE) {
- surf.ss1.base_addr = key.draw_offset;
+ surf.ss1.base_addr = (key.draw_x + key.draw_y * key.pitch) * key.cpp;
} else {
- uint32_t tile_offset = key.draw_offset % 4096;
-
- surf.ss1.base_addr = key.draw_offset - tile_offset;
-
- if (brw->has_surface_tile_offset) {
- if (key.tiling == I915_TILING_X) {
- /* Note that the low bits of these fields are missing, so
- * there's the possibility of getting in trouble.
- */
- surf.ss5.x_offset = (tile_offset % 512) / key.cpp / 4;
- surf.ss5.y_offset = tile_offset / 512 / 2;
- } else {
- surf.ss5.x_offset = (tile_offset % 128) / key.cpp / 4;
- surf.ss5.y_offset = tile_offset / 128 / 2;
- }
+ uint32_t tile_base, tile_x, tile_y;
+ uint32_t pitch = key.pitch * key.cpp;
+
+ if (key.tiling == I915_TILING_X) {
+ tile_x = key.draw_x % (512 / key.cpp);
+ tile_y = key.draw_y % 8;
+ tile_base = ((key.draw_y / 8) * (8 * pitch));
+ tile_base += (key.draw_x - tile_x) / (512 / key.cpp) * 4096;
} else {
- assert(tile_offset == 0);
+ /* Y */
+ tile_x = key.draw_x % (128 / key.cpp);
+ tile_y = key.draw_y % 32;
+ tile_base = ((key.draw_y / 32) * (32 * pitch));
+ tile_base += (key.draw_x - tile_x) / (128 / key.cpp) * 4096;
}
+ assert(BRW_IS_G4X(brw) || (tile_x == 0 && tile_y == 0));
+ assert(tile_x % 4 == 0);
+ assert(tile_y % 2 == 0);
+ /* Note that the low bits of these fields are missing, so
+ * there's the possibility of getting in trouble.
+ */
+ surf.ss1.base_addr = tile_base;
+ surf.ss5.x_offset = tile_x / 4;
+ surf.ss5.y_offset = tile_y / 2;
}
if (region_bo != NULL)
surf.ss1.base_addr += region_bo->offset; /* reloc */
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 05643189a2..97d56e4e67 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -291,6 +291,12 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
}
+ /* If we have a (packed) stencil buffer attached but no depth buffer,
+ * we still need to set up the shared depth/stencil state so we can use it.
+ */
+ if (depthRegion == NULL && irbStencil && irbStencil->region)
+ depthRegion = irbStencil->region;
+
/*
* Update depth and stencil test state
*/
diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index f682ee3de5..956f2339ff 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -68,7 +68,7 @@ static void
intelClear(GLcontext *ctx, GLbitfield mask)
{
struct intel_context *intel = intel_context(ctx);
- const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+ const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]);
GLbitfield tri_mask = 0;
GLbitfield blit_mask = 0;
GLbitfield swrast_mask = 0;
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 02e0cc7b33..eccba5bd23 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -598,7 +598,6 @@ intelInitContext(struct intel_context *intel,
GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
- int fthrottle_mode;
int bo_reuse_mode;
if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,
@@ -740,8 +739,6 @@ intelInitContext(struct intel_context *intel,
intel->RenderIndex = ~0;
- fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
-
if (intel->gen >= 4 && !intel->intelScreen->irq_active) {
_mesa_printf("IRQs not active. Exiting\n");
exit(1);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index e85886db82..09e8223bc7 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -335,14 +335,14 @@ extern char *__progname;
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
#define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
-static inline uint32_t
+static INLINE uint32_t
U_FIXED(float value, uint32_t frac_bits)
{
value *= (1 << frac_bits);
return value < 0 ? 0 : value;
}
-static inline uint32_t
+static INLINE uint32_t
S_FIXED(float value, uint32_t frac_bits)
{
return value * (1 << frac_bits);
@@ -546,7 +546,7 @@ is_power_of_two(uint32_t value)
return (value & (value - 1)) == 0;
}
-static inline void
+static INLINE void
intel_bo_map_gtt_preferred(struct intel_context *intel,
drm_intel_bo *bo,
GLboolean write)
@@ -557,7 +557,7 @@ intel_bo_map_gtt_preferred(struct intel_context *intel,
drm_intel_bo_map(bo, write);
}
-static inline void
+static INLINE void
intel_bo_unmap_gtt_preferred(struct intel_context *intel,
drm_intel_bo *bo)
{
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index fc502a87d3..32c43ae185 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -427,7 +427,8 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
DBG("Render to DEPTH_STENCIL texture OK\n");
}
else {
- DBG("Render to texture BAD FORMAT %d\n", texImage->TexFormat);
+ DBG("Render to texture BAD FORMAT %s\n",
+ _mesa_get_format_name(texImage->TexFormat));
return GL_FALSE;
}
@@ -590,11 +591,21 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
intel_get_renderbuffer(fb, BUFFER_STENCIL);
int i;
- if (stencilRb && stencilRb != depthRb) {
- /* we only support combined depth/stencil buffers, not separate
- * stencil buffers.
- */
- fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
+ if (depthRb && stencilRb && stencilRb != depthRb) {
+ if (ctx->DrawBuffer->Attachment[BUFFER_DEPTH].Type == GL_TEXTURE &&
+ ctx->DrawBuffer->Attachment[BUFFER_STENCIL].Type == GL_TEXTURE &&
+ (ctx->DrawBuffer->Attachment[BUFFER_DEPTH].Texture->Name ==
+ ctx->DrawBuffer->Attachment[BUFFER_STENCIL].Texture->Name)) {
+ /* OK */
+ } else {
+ /* we only support combined depth/stencil buffers, not separate
+ * stencil buffers.
+ */
+ DBG("Only supports combined depth/stencil (found %s, %s)\n",
+ depthRb ? _mesa_get_format_name(depthRb->Base.Format): "NULL",
+ stencilRb ? _mesa_get_format_name(stencilRb->Base.Format): "NULL");
+ fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
+ }
}
for (i = 0; i < ctx->Const.MaxDrawBuffers; i++) {
@@ -605,6 +616,7 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
continue;
if (irb == NULL) {
+ DBG("software rendering renderbuffer\n");
fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
continue;
}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel.c b/src/mesa/drivers/dri/intel/intel_pixel.c
index 993e427a99..5142f3dcd9 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel.c
@@ -88,10 +88,10 @@ intel_check_blit_fragment_ops(GLcontext * ctx, GLboolean src_alpha_is_one)
return GL_FALSE;
}
- if (!(ctx->Color.ColorMask[0] &&
- ctx->Color.ColorMask[1] &&
- ctx->Color.ColorMask[2] &&
- ctx->Color.ColorMask[3])) {
+ if (!(ctx->Color.ColorMask[0][0] &&
+ ctx->Color.ColorMask[0][1] &&
+ ctx->Color.ColorMask[0][2] &&
+ ctx->Color.ColorMask[0][3])) {
DBG("fallback due to color masking\n");
return GL_FALSE;
}
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index d0bcc2a360..f23f94f35e 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -32,6 +32,7 @@
#include "main/mtypes.h"
#include "main/macros.h"
#include "main/bufferobj.h"
+#include "main/polygon.h"
#include "main/pixelstore.h"
#include "main/polygon.h"
#include "main/state.h"
@@ -165,7 +166,7 @@ static GLuint get_bitmap_rect(GLsizei width, GLsizei height,
* Returns the low Y value of the vertical range given, flipped according to
* whether the framebuffer is or not.
*/
-static inline int
+static INLINE int
y_flip(struct gl_framebuffer *fb, int y, int height)
{
if (fb->Name != 0)
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
index 622aaa22d6..689a00cb00 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -83,10 +83,10 @@ intel_check_copypixel_blit_fragment_ops(GLcontext * ctx)
ctx->Depth.Test ||
ctx->Fog.Enabled ||
ctx->Stencil._Enabled ||
- !ctx->Color.ColorMask[0] ||
- !ctx->Color.ColorMask[1] ||
- !ctx->Color.ColorMask[2] ||
- !ctx->Color.ColorMask[3] ||
+ !ctx->Color.ColorMask[0][0] ||
+ !ctx->Color.ColorMask[0][1] ||
+ !ctx->Color.ColorMask[0][2] ||
+ !ctx->Color.ColorMask[0][3] ||
ctx->Texture._EnabledUnits ||
ctx->FragmentProgram._Enabled ||
ctx->Color.BlendEnabled);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 68e8db1de6..a3d676741a 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -57,7 +57,6 @@
PUBLIC const char __driConfigOptions[] =
DRI_CONF_BEGIN
DRI_CONF_SECTION_PERFORMANCE
- DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
/* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
* DRI_CONF_BO_REUSE_ALL
@@ -99,7 +98,7 @@ PUBLIC const char __driConfigOptions[] =
DRI_CONF_SECTION_END
DRI_CONF_END;
-const GLuint __driNConfigOptions = 12;
+const GLuint __driNConfigOptions = 11;
#ifdef USE_NEW_INTERFACE
static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 767d04d2f4..ef5aed32f3 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -109,7 +109,7 @@ do_copy_texsubimage(struct intel_context *intel,
return GL_FALSE;
}
- // intelFlush(ctx);
+ /* intelFlush(ctx); */
LOCK_HARDWARE(intel);
{
drm_intel_bo *dst_bo = intel_region_buffer(intel,
@@ -160,13 +160,14 @@ do_copy_texsubimage(struct intel_context *intel,
intelImage->mt->cpp,
src_pitch,
src->buffer,
- src->draw_offset,
+ 0,
src->tiling,
intelImage->mt->pitch,
dst_bo,
0,
intelImage->mt->region->tiling,
- x, y, image_x + dstx, image_y + dsty,
+ src->draw_x + x, src->draw_y + y,
+ image_x + dstx, image_y + dsty,
width, height,
GL_COPY)) {
UNLOCK_HARDWARE(intel);
diff --git a/src/mesa/drivers/dri/mach64/mach64_state.c b/src/mesa/drivers/dri/mach64/mach64_state.c
index 3a023187ce..902905de71 100644
--- a/src/mesa/drivers/dri/mach64/mach64_state.c
+++ b/src/mesa/drivers/dri/mach64/mach64_state.c
@@ -527,10 +527,10 @@ static void mach64UpdateMasks( GLcontext *ctx )
/* mach64 can't color mask with alpha blending enabled */
if ( !ctx->Color.BlendEnabled ) {
mask = mach64PackColor( mmesa->mach64Screen->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP] );
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP] );
}
if ( mmesa->setup.dp_write_mask != mask ) {
diff --git a/src/mesa/drivers/dri/mach64/mach64_tex.c b/src/mesa/drivers/dri/mach64/mach64_tex.c
index 72917ee13b..6627d3c38a 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tex.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tex.c
@@ -130,7 +130,7 @@ mach64AllocTexObj( struct gl_texture_object *texObj )
mach64SetTexWrap( t, texObj->WrapS, texObj->WrapT );
mach64SetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
- mach64SetTexBorderColor( t, texObj->BorderColor );
+ mach64SetTexBorderColor( t, texObj->BorderColor.f );
return t;
}
@@ -470,7 +470,7 @@ static void mach64DDTexParameter( GLcontext *ctx, GLenum target,
case GL_TEXTURE_BORDER_COLOR:
if ( t->base.bound ) FLUSH_BATCH( mmesa );
- mach64SetTexBorderColor( t, tObj->BorderColor );
+ mach64SetTexBorderColor( t, tObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
diff --git a/src/mesa/drivers/dri/mga/mgapixel.c b/src/mesa/drivers/dri/mga/mgapixel.c
index 977dfa0b76..05b30ba61e 100644
--- a/src/mesa/drivers/dri/mga/mgapixel.c
+++ b/src/mesa/drivers/dri/mga/mgapixel.c
@@ -134,10 +134,10 @@ check_color_per_fragment_ops( const GLcontext *ctx )
ctx->Fog.Enabled ||
ctx->Scissor.Enabled ||
ctx->Stencil._Enabled ||
- !ctx->Color.ColorMask[0] ||
- !ctx->Color.ColorMask[1] ||
- !ctx->Color.ColorMask[2] ||
- !ctx->Color.ColorMask[3] ||
+ !ctx->Color.ColorMask[0][0] ||
+ !ctx->Color.ColorMask[0][1] ||
+ !ctx->Color.ColorMask[0][2] ||
+ !ctx->Color.ColorMask[0][3] ||
ctx->Color.ColorLogicOpEnabled ||
ctx->Texture._EnabledUnits
) &&
@@ -150,10 +150,10 @@ static GLboolean
check_depth_per_fragment_ops( const GLcontext *ctx )
{
return ( ctx->Current.RasterPosValid &&
- ctx->Color.ColorMask[RCOMP] == 0 &&
- ctx->Color.ColorMask[BCOMP] == 0 &&
- ctx->Color.ColorMask[GCOMP] == 0 &&
- ctx->Color.ColorMask[ACOMP] == 0 &&
+ ctx->Color.ColorMask[0][RCOMP] == 0 &&
+ ctx->Color.ColorMask[0][BCOMP] == 0 &&
+ ctx->Color.ColorMask[0][GCOMP] == 0 &&
+ ctx->Color.ColorMask[0][ACOMP] == 0 &&
ctx->Pixel.ZoomX == 1.0F &&
( ctx->Pixel.ZoomY == 1.0F || ctx->Pixel.ZoomY == -1.0F ) );
}
@@ -525,10 +525,10 @@ mgaTryDrawPixels( GLcontext *ctx,
mmesa->mgaScreen->backOffset);
planemask = mgaPackColor(cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP]);
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP]);
if (cpp == 2)
planemask |= planemask << 16;
diff --git a/src/mesa/drivers/dri/mga/mgastate.c b/src/mesa/drivers/dri/mga/mgastate.c
index 7c830ec097..1e51057534 100644
--- a/src/mesa/drivers/dri/mga/mgastate.c
+++ b/src/mesa/drivers/dri/mga/mgastate.c
@@ -374,13 +374,11 @@ static void mgaDDColorMask(GLcontext *ctx,
{
mgaContextPtr mmesa = MGA_CONTEXT( ctx );
mgaScreenPrivate *mgaScreen = mmesa->mgaScreen;
-
-
GLuint mask = mgaPackColor(mgaScreen->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP]);
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP]);
if (mgaScreen->cpp == 2)
mask = mask | (mask << 16);
diff --git a/src/mesa/drivers/dri/mga/mgatex.c b/src/mesa/drivers/dri/mga/mgatex.c
index 9163371b33..62a9317cd4 100644
--- a/src/mesa/drivers/dri/mga/mgatex.c
+++ b/src/mesa/drivers/dri/mga/mgatex.c
@@ -332,7 +332,7 @@ mgaAllocTexObj( struct gl_texture_object *tObj )
mgaSetTexWrapping( t, tObj->WrapS, tObj->WrapT );
mgaSetTexFilter( t, tObj->MinFilter, tObj->MagFilter );
- mgaSetTexBorderColor( t, tObj->BorderColor );
+ mgaSetTexBorderColor( t, tObj->BorderColor.f );
}
return( t );
@@ -461,7 +461,7 @@ mgaTexParameter( GLcontext *ctx, GLenum target,
case GL_TEXTURE_BORDER_COLOR:
FLUSH_BATCH(mmesa);
- mgaSetTexBorderColor(t, tObj->BorderColor);
+ mgaSetTexBorderColor(t, tObj->BorderColor.f);
break;
case GL_TEXTURE_BASE_LEVEL:
diff --git a/src/mesa/drivers/dri/r128/r128_state.c b/src/mesa/drivers/dri/r128/r128_state.c
index 4ae7bf5b97..ac175d59ec 100644
--- a/src/mesa/drivers/dri/r128/r128_state.c
+++ b/src/mesa/drivers/dri/r128/r128_state.c
@@ -702,10 +702,10 @@ static void r128UpdateMasks( GLcontext *ctx )
r128ContextPtr rmesa = R128_CONTEXT(ctx);
GLuint mask = r128PackColor( rmesa->r128Screen->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP] );
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP] );
if ( rmesa->setup.plane_3d_mask_c != mask ) {
rmesa->setup.plane_3d_mask_c = mask;
diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c
index 0a1207fb89..f1be7cc1c4 100644
--- a/src/mesa/drivers/dri/r128/r128_tex.c
+++ b/src/mesa/drivers/dri/r128/r128_tex.c
@@ -169,7 +169,7 @@ static r128TexObjPtr r128AllocTexObj( struct gl_texture_object *texObj )
r128SetTexWrap( t, texObj->WrapS, texObj->WrapT );
r128SetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
- r128SetTexBorderColor( t, texObj->BorderColor );
+ r128SetTexBorderColor( t, texObj->BorderColor.f );
}
return t;
@@ -535,7 +535,7 @@ static void r128TexParameter( GLcontext *ctx, GLenum target,
case GL_TEXTURE_BORDER_COLOR:
if ( t->base.bound ) FLUSH_BATCH( rmesa );
- r128SetTexBorderColor( t, tObj->BorderColor );
+ r128SetTexBorderColor( t, tObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c
index 95773871e0..94e43c7d66 100644
--- a/src/mesa/drivers/dri/r200/r200_pixel.c
+++ b/src/mesa/drivers/dri/r200/r200_pixel.c
@@ -88,10 +88,10 @@ check_color_per_fragment_ops( const GLcontext *ctx )
ctx->Fog.Enabled ||
ctx->Scissor.Enabled ||
ctx->Stencil._Enabled ||
- !ctx->Color.ColorMask[0] ||
- !ctx->Color.ColorMask[1] ||
- !ctx->Color.ColorMask[2] ||
- !ctx->Color.ColorMask[3] ||
+ !ctx->Color.ColorMask[0][0] ||
+ !ctx->Color.ColorMask[0][1] ||
+ !ctx->Color.ColorMask[0][2] ||
+ !ctx->Color.ColorMask[0][3] ||
ctx->Color.ColorLogicOpEnabled ||
ctx->Texture._EnabledUnits
) &&
@@ -400,10 +400,10 @@ r200TryDrawPixels( GLcontext *ctx,
case GL_RGBA:
case GL_BGRA:
planemask = radeonPackColor(cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP]);
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP]);
if (cpp == 2)
planemask |= planemask << 16;
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 6d99c039de..529cb62264 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -721,10 +721,10 @@ static void r200ColorMask( GLcontext *ctx,
if (!rrb)
return;
mask = radeonPackColor( rrb->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP] );
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP] );
if (!(r && g && b && a))
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index a417721553..5b87ba6ccd 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -378,7 +378,7 @@ static void r200TexParameter( GLcontext *ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- r200SetTexBorderColor( t, texObj->BorderColor );
+ r200SetTexBorderColor( t, texObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
@@ -470,7 +470,7 @@ static struct gl_texture_object *r200NewTextureObject(GLcontext * ctx,
r200SetTexWrap( t, t->base.WrapS, t->base.WrapT, t->base.WrapR );
r200SetTexMaxAnisotropy( t, t->base.MaxAnisotropy );
r200SetTexFilter(t, t->base.MinFilter, t->base.MagFilter);
- r200SetTexBorderColor(t, t->base.BorderColor);
+ r200SetTexBorderColor(t, t->base.BorderColor.f);
return &t->base;
}
diff --git a/src/mesa/drivers/dri/r300/compiler/memory_pool.c b/src/mesa/drivers/dri/r300/compiler/memory_pool.c
index 37aa2b6579..76c7c60d8f 100644
--- a/src/mesa/drivers/dri/r300/compiler/memory_pool.c
+++ b/src/mesa/drivers/dri/r300/compiler/memory_pool.c
@@ -71,12 +71,14 @@ static void refill_pool(struct memory_pool * pool)
void * memory_pool_malloc(struct memory_pool * pool, unsigned int bytes)
{
if (bytes < POOL_LARGE_ALLOC) {
+ void * ptr;
+
if (pool->head + bytes > pool->end)
refill_pool(pool);
assert(pool->head + bytes <= pool->end);
- void * ptr = pool->head;
+ ptr = pool->head;
pool->head += bytes;
pool->head = (unsigned char*)(((unsigned long)pool->head + POOL_ALIGN - 1) & ~(POOL_ALIGN - 1));
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_code.c b/src/mesa/drivers/dri/r300/compiler/radeon_code.c
index 1a3d8bb641..853b2becd1 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_code.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_code.c
@@ -143,7 +143,8 @@ unsigned rc_constants_add_immediate_scalar(struct rc_constant_list * c, float da
for(index = 0; index < c->Count; ++index) {
if (c->Constants[index].Type == RC_CONSTANT_IMMEDIATE) {
- for(unsigned comp = 0; comp < c->Constants[index].Size; ++comp) {
+ unsigned comp;
+ for(comp = 0; comp < c->Constants[index].Size; ++comp) {
if (c->Constants[index].u.Immediate[comp] == data) {
*swizzle = RC_MAKE_SWIZZLE(comp, comp, comp, comp);
return index;
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_compiler.c b/src/mesa/drivers/dri/r300/compiler/radeon_compiler.c
index c0e7a7f7a0..41ea23ee32 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_compiler.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_compiler.c
@@ -232,12 +232,16 @@ void rc_copy_output(struct radeon_compiler * c, unsigned output, unsigned dup_ou
void rc_transform_fragment_wpos(struct radeon_compiler * c, unsigned wpos, unsigned new_input)
{
unsigned tempregi = rc_find_free_temporary(c);
+ struct rc_instruction * inst_rcp;
+ struct rc_instruction * inst_mul;
+ struct rc_instruction * inst_mad;
+ struct rc_instruction * inst;
c->Program.InputsRead &= ~(1 << wpos);
c->Program.InputsRead |= 1 << new_input;
/* perspective divide */
- struct rc_instruction * inst_rcp = rc_insert_new_instruction(c, &c->Program.Instructions);
+ inst_rcp = rc_insert_new_instruction(c, &c->Program.Instructions);
inst_rcp->U.I.Opcode = RC_OPCODE_RCP;
inst_rcp->U.I.DstReg.File = RC_FILE_TEMPORARY;
@@ -248,7 +252,7 @@ void rc_transform_fragment_wpos(struct radeon_compiler * c, unsigned wpos, unsig
inst_rcp->U.I.SrcReg[0].Index = new_input;
inst_rcp->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_WWWW;
- struct rc_instruction * inst_mul = rc_insert_new_instruction(c, inst_rcp);
+ inst_mul = rc_insert_new_instruction(c, inst_rcp);
inst_mul->U.I.Opcode = RC_OPCODE_MUL;
inst_mul->U.I.DstReg.File = RC_FILE_TEMPORARY;
@@ -263,7 +267,7 @@ void rc_transform_fragment_wpos(struct radeon_compiler * c, unsigned wpos, unsig
inst_mul->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_WWWW;
/* viewport transformation */
- struct rc_instruction * inst_mad = rc_insert_new_instruction(c, inst_mul);
+ inst_mad = rc_insert_new_instruction(c, inst_mul);
inst_mad->U.I.Opcode = RC_OPCODE_MAD;
inst_mad->U.I.DstReg.File = RC_FILE_TEMPORARY;
@@ -282,7 +286,6 @@ void rc_transform_fragment_wpos(struct radeon_compiler * c, unsigned wpos, unsig
inst_mad->U.I.SrcReg[2].Index = inst_mad->U.I.SrcReg[1].Index;
inst_mad->U.I.SrcReg[2].Swizzle = RC_MAKE_SWIZZLE(RC_SWIZZLE_X, RC_SWIZZLE_Y, RC_SWIZZLE_Z, RC_SWIZZLE_ZERO);
- struct rc_instruction * inst;
for (inst = inst_mad->Next; inst != &c->Program.Instructions; inst = inst->Next) {
const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
unsigned i;
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
index ced66af1eb..b5c08aea49 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
@@ -267,9 +267,9 @@ static void transform_LIT(struct radeon_compiler* c,
temp = inst->U.I.DstReg.Index;
srctemp = srcreg(RC_FILE_TEMPORARY, temp);
- // tmp.x = max(0.0, Src.x);
- // tmp.y = max(0.0, Src.y);
- // tmp.w = clamp(Src.z, -128+eps, 128-eps);
+ /* tmp.x = max(0.0, Src.x); */
+ /* tmp.y = max(0.0, Src.y); */
+ /* tmp.w = clamp(Src.z, -128+eps, 128-eps); */
emit2(c, inst->Prev, RC_OPCODE_MAX, 0,
dstregtmpmask(temp, RC_MASK_XYW),
inst->U.I.SrcReg[0],
@@ -280,7 +280,7 @@ static void transform_LIT(struct radeon_compiler* c,
swizzle(srctemp, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W),
negate(srcregswz(RC_FILE_CONSTANT, constant, constant_swizzle)));
- // tmp.w = Pow(tmp.y, tmp.w)
+ /* tmp.w = Pow(tmp.y, tmp.w) */
emit1(c, inst->Prev, RC_OPCODE_LG2, 0,
dstregtmpmask(temp, RC_MASK_W),
swizzle(srctemp, RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y, RC_SWIZZLE_Y));
@@ -292,14 +292,14 @@ static void transform_LIT(struct radeon_compiler* c,
dstregtmpmask(temp, RC_MASK_W),
swizzle(srctemp, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W));
- // tmp.z = (tmp.x > 0) ? tmp.w : 0.0
+ /* tmp.z = (tmp.x > 0) ? tmp.w : 0.0 */
emit3(c, inst->Prev, RC_OPCODE_CMP, inst->U.I.SaturateMode,
dstregtmpmask(temp, RC_MASK_Z),
negate(swizzle(srctemp, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X)),
swizzle(srctemp, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W, RC_SWIZZLE_W),
builtin_zero);
- // tmp.x, tmp.y, tmp.w = 1.0, tmp.x, 1.0
+ /* tmp.x, tmp.y, tmp.w = 1.0, tmp.x, 1.0 */
emit1(c, inst->Prev, RC_OPCODE_MOV, inst->U.I.SaturateMode,
dstregtmpmask(temp, RC_MASK_XYW),
swizzle(srctemp, RC_SWIZZLE_ONE, RC_SWIZZLE_X, RC_SWIZZLE_ONE, RC_SWIZZLE_ONE));
@@ -533,16 +533,16 @@ static void sincos_constants(struct radeon_compiler* c, unsigned int *constants)
{
static const float SinCosConsts[2][4] = {
{
- 1.273239545, // 4/PI
- -0.405284735, // -4/(PI*PI)
- 3.141592654, // PI
- 0.2225 // weight
+ 1.273239545, /* 4/PI */
+ -0.405284735, /* -4/(PI*PI) */
+ 3.141592654, /* PI */
+ 0.2225 /* weight */
},
{
0.75,
0.5,
- 0.159154943, // 1/(2*PI)
- 6.283185307 // 2*PI
+ 0.159154943, /* 1/(2*PI) */
+ 6.283185307 /* 2*PI */
}
};
int i;
@@ -602,9 +602,9 @@ int radeonTransformTrigSimple(struct radeon_compiler* c,
sincos_constants(c, constants);
if (inst->U.I.Opcode == RC_OPCODE_COS) {
- // MAD tmp.x, src, 1/(2*PI), 0.75
- // FRC tmp.x, tmp.x
- // MAD tmp.z, tmp.x, 2*PI, -PI
+ /* MAD tmp.x, src, 1/(2*PI), 0.75 */
+ /* FRC tmp.x, tmp.x */
+ /* MAD tmp.z, tmp.x, 2*PI, -PI */
emit3(c, inst->Prev, RC_OPCODE_MAD, 0, dstregtmpmask(tempreg, RC_MASK_W),
swizzle(inst->U.I.SrcReg[0], RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X, RC_SWIZZLE_X),
swizzle(srcreg(RC_FILE_CONSTANT, constants[1]), RC_SWIZZLE_Z, RC_SWIZZLE_Z, RC_SWIZZLE_Z, RC_SWIZZLE_Z),
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 23f81fe790..f90bfd4f4f 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1768,9 +1768,10 @@ static void r300ResetHwState(r300ContextPtr r300)
radeon_firevertices(&r300->radeon);
r300ColorMask(ctx,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP]);
r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
r300DepthMask(ctx, ctx->Depth.Mask);
diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c
index ac3d5b1bec..963f648cb1 100644
--- a/src/mesa/drivers/dri/r300/r300_tex.c
+++ b/src/mesa/drivers/dri/r300/r300_tex.c
@@ -215,7 +215,7 @@ static void r300TexParameter(GLcontext * ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- r300SetTexBorderColor(t, texObj->BorderColor);
+ r300SetTexBorderColor(t, texObj->BorderColor.f);
break;
case GL_TEXTURE_BASE_LEVEL:
@@ -307,7 +307,7 @@ static struct gl_texture_object *r300NewTextureObject(GLcontext * ctx,
/* Initialize hardware state */
r300UpdateTexWrap(t);
r300SetTexFilter(t, t->base.MinFilter, t->base.MagFilter, t->base.MaxAnisotropy);
- r300SetTexBorderColor(t, t->base.BorderColor);
+ r300SetTexBorderColor(t, t->base.BorderColor.f);
return &t->base;
}
diff --git a/src/mesa/drivers/dri/r600/r600_context.h b/src/mesa/drivers/dri/r600/r600_context.h
index 394fd757d4..94662ab547 100644
--- a/src/mesa/drivers/dri/r600/r600_context.h
+++ b/src/mesa/drivers/dri/r600/r600_context.h
@@ -108,6 +108,7 @@ typedef struct StreamDesc
GLint size; //number of data element
GLenum type; //data element type
GLsizei stride;
+ GLenum format; // GL_RGBA,GLBGRA
struct radeon_bo *bo;
GLint bo_offset;
diff --git a/src/mesa/drivers/dri/r600/r600_tex.c b/src/mesa/drivers/dri/r600/r600_tex.c
index 9d83a64e22..f745fe3e8a 100644
--- a/src/mesa/drivers/dri/r600/r600_tex.c
+++ b/src/mesa/drivers/dri/r600/r600_tex.c
@@ -305,7 +305,7 @@ static void r600TexParameter(GLcontext * ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- r600SetTexBorderColor(t, texObj->BorderColor);
+ r600SetTexBorderColor(t, texObj->BorderColor.f);
break;
case GL_TEXTURE_BASE_LEVEL:
@@ -391,7 +391,7 @@ static struct gl_texture_object *r600NewTextureObject(GLcontext * ctx,
r600SetTexDefaultState(t);
r600UpdateTexWrap(t);
r600SetTexFilter(t, t->base.MinFilter, t->base.MagFilter, t->base.MaxAnisotropy);
- r600SetTexBorderColor(t, t->base.BorderColor);
+ r600SetTexBorderColor(t, t->base.BorderColor.f);
return &t->base;
}
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index e464c6191c..1ff89e18ea 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -891,6 +891,7 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
GLubyte element,
GLuint _signed,
GLboolean normalize,
+ GLenum format,
VTX_FETCH_METHOD * pFetchMethod)
{
GLuint client_size_inbyte;
@@ -939,10 +940,21 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
vfetch_instruction_ptr->m_Word0.f.src_sel_x = SQ_SEL_X;
vfetch_instruction_ptr->m_Word0.f.mega_fetch_count = mega_fetch_count;
- vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_X;
- vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
- vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_Z;
- vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
+ if(format == GL_BGRA)
+ {
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_Z;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_X;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
+ }
+ else
+ {
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_x = (size < 1) ? SQ_SEL_0 : SQ_SEL_X;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_y = (size < 2) ? SQ_SEL_0 : SQ_SEL_Y;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_z = (size < 3) ? SQ_SEL_0 : SQ_SEL_Z;
+ vfetch_instruction_ptr->m_Word1.f.dst_sel_w = (size < 4) ? SQ_SEL_1 : SQ_SEL_W;
+
+ }
vfetch_instruction_ptr->m_Word1.f.use_const_fields = 1;
vfetch_instruction_ptr->m_Word1.f.data_format = data_format;
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h
index dbd9860f7d..86342b814f 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.h
+++ b/src/mesa/drivers/dri/r600/r700_assembler.h
@@ -531,6 +531,7 @@ GLboolean assemble_vfetch_instruction2(r700_AssemblerBase* pAsm,
GLubyte element,
GLuint _signed,
GLboolean normalize,
+ GLenum format,
VTX_FETCH_METHOD * pFetchMethod);
GLboolean cleanup_vfetch_instructions(r700_AssemblerBase* pAsm);
GLuint gethelpr(r700_AssemblerBase* pAsm);
diff --git a/src/mesa/drivers/dri/r600/r700_clear.c b/src/mesa/drivers/dri/r600/r700_clear.c
index 526d3843d1..c0ac54a844 100644
--- a/src/mesa/drivers/dri/r600/r700_clear.c
+++ b/src/mesa/drivers/dri/r600/r700_clear.c
@@ -50,7 +50,7 @@ void r700Clear(GLcontext * ctx, GLbitfield mask)
{
context_t *context = R700_CONTEXT(ctx);
__DRIdrawablePrivate *dPriv = radeon_get_drawable(&context->radeon);
- const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+ const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]);
GLbitfield swrast_mask = 0, tri_mask = 0;
int i;
struct gl_framebuffer *fb = ctx->DrawBuffer;
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 16b05d5cd9..fc6fb29fd6 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -1724,10 +1724,10 @@ void r700InitState(GLcontext * ctx) //-------------------
r700InitSQConfig(ctx);
r700ColorMask(ctx,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP]);
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP]);
r700Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
r700DepthMask(ctx, ctx->Depth.Mask);
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index 90fac078ff..782f151f5a 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -188,7 +188,8 @@ GLboolean Process_Vertex_Program_Vfetch_Instructions2(
context->stream_desc[i].size,
context->stream_desc[i].element,
context->stream_desc[i]._signed,
- context->stream_desc[i].normalize,
+ context->stream_desc[i].normalize,
+ context->stream_desc[i].format,
&vtxFetchMethod);
}
@@ -319,6 +320,7 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
vp->aos_desc[i].size = context->stream_desc[i].size;
vp->aos_desc[i].stride = context->stream_desc[i].stride;
vp->aos_desc[i].type = context->stream_desc[i].type;
+ vp->aos_desc[i].format = context->stream_desc[i].format;
}
if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
@@ -395,7 +397,8 @@ void r700SelectVertexShader(GLcontext *ctx)
match = GL_TRUE;
for(i=0; i<context->nNumActiveAos; i++)
{
- if (vp->aos_desc[i].size != context->stream_desc[i].size)
+ if (vp->aos_desc[i].size != context->stream_desc[i].size ||
+ vp->aos_desc[i].format != context->stream_desc[i].format)
{
match = GL_FALSE;
break;
@@ -498,6 +501,7 @@ static void r700TranslateAttrib(GLcontext *ctx, GLuint unLoc, int count, const s
pStreamDesc->size = input->Size;
pStreamDesc->dst_loc = context->nNumActiveAos;
pStreamDesc->element = unLoc;
+ pStreamDesc->format = input->Format;
switch (pStreamDesc->type)
{ //GetSurfaceFormat
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.h b/src/mesa/drivers/dri/r600/r700_vertprog.h
index 00824c29d3..645c9ac84a 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.h
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.h
@@ -39,6 +39,7 @@ typedef struct ArrayDesc //TEMP
GLint size; //number of data element
GLenum type; //data element type
GLsizei stride;
+ GLenum format; //GL_RGBA or GL_BGRA
} ArrayDesc;
struct r700_vertex_program
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index f6c733ab20..1fcb545204 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -521,10 +521,10 @@ static void radeonColorMask( GLcontext *ctx,
return;
mask = radeonPackColor( rrb->cpp,
- ctx->Color.ColorMask[RCOMP],
- ctx->Color.ColorMask[GCOMP],
- ctx->Color.ColorMask[BCOMP],
- ctx->Color.ColorMask[ACOMP] );
+ ctx->Color.ColorMask[0][RCOMP],
+ ctx->Color.ColorMask[0][GCOMP],
+ ctx->Color.ColorMask[0][BCOMP],
+ ctx->Color.ColorMask[0][ACOMP] );
if ( rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] != mask ) {
RADEON_STATECHANGE( rmesa, msk );
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index 749ab75f20..14163f13af 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -341,7 +341,7 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- radeonSetTexBorderColor( t, texObj->BorderColor );
+ radeonSetTexBorderColor( t, texObj->BorderColor.f );
break;
case GL_TEXTURE_BASE_LEVEL:
@@ -428,7 +428,7 @@ radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
radeonSetTexWrap( t, t->base.WrapS, t->base.WrapT );
radeonSetTexMaxAnisotropy( t, t->base.MaxAnisotropy );
radeonSetTexFilter( t, t->base.MinFilter, t->base.MagFilter );
- radeonSetTexBorderColor( t, t->base.BorderColor );
+ radeonSetTexBorderColor( t, t->base.BorderColor.f );
return &t->base;
}
diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c
index 77ab8d16e0..706fc97935 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.c
+++ b/src/mesa/drivers/dri/savage/savageioctl.c
@@ -360,15 +360,15 @@ static void savageDDClear( GLcontext *ctx, GLbitfield mask )
depthMask = 0;
switch (imesa->savageScreen->cpp) {
case 2:
- colorMask = PACK_COLOR_565(ctx->Color.ColorMask[0],
- ctx->Color.ColorMask[1],
- ctx->Color.ColorMask[2]);
+ colorMask = PACK_COLOR_565(ctx->Color.ColorMask[0][0],
+ ctx->Color.ColorMask[0][1],
+ ctx->Color.ColorMask[0][2]);
break;
case 4:
- colorMask = PACK_COLOR_8888(ctx->Color.ColorMask[3],
- ctx->Color.ColorMask[2],
- ctx->Color.ColorMask[1],
- ctx->Color.ColorMask[0]);
+ colorMask = PACK_COLOR_8888(ctx->Color.ColorMask[0][3],
+ ctx->Color.ColorMask[0][2],
+ ctx->Color.ColorMask[0][1],
+ ctx->Color.ColorMask[0][0]);
break;
}
diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c
index 6c97bb6c70..97598f599e 100644
--- a/src/mesa/drivers/dri/savage/savagetex.c
+++ b/src/mesa/drivers/dri/savage/savagetex.c
@@ -507,7 +507,7 @@ savageAllocTexObj( struct gl_texture_object *texObj )
savageSetTexWrapping(t,texObj->WrapS,texObj->WrapT);
savageSetTexFilter(t,texObj->MinFilter,texObj->MagFilter);
- savageSetTexBorderColor(t,texObj->BorderColor);
+ savageSetTexBorderColor(t,texObj->BorderColor.f);
}
return t;
@@ -2044,7 +2044,7 @@ static void savageTexParameter( GLcontext *ctx, GLenum target,
break;
case GL_TEXTURE_BORDER_COLOR:
- savageSetTexBorderColor(t,tObj->BorderColor);
+ savageSetTexBorderColor(t,tObj->BorderColor.f);
break;
default:
diff --git a/src/mesa/drivers/dri/sis/sis_context.c b/src/mesa/drivers/dri/sis/sis_context.c
index f501e7ad2e..346e8c5568 100644
--- a/src/mesa/drivers/dri/sis/sis_context.c
+++ b/src/mesa/drivers/dri/sis/sis_context.c
@@ -83,6 +83,7 @@ static struct dri_extension card_extensions[] =
{ NULL, NULL }
};
+#if 0
static struct dri_extension card_extensions_6326[] =
{
/*{ "GL_ARB_texture_border_clamp", NULL },*/
@@ -90,6 +91,7 @@ static struct dri_extension card_extensions_6326[] =
/*{ "GL_MESA_ycbcr_texture", NULL },*/
{ NULL, NULL }
};
+#endif
static const struct dri_debug_control debug_control[] =
{
diff --git a/src/mesa/drivers/dri/sis/sis_texstate.c b/src/mesa/drivers/dri/sis/sis_texstate.c
index a507173b21..4c22a10cf7 100644
--- a/src/mesa/drivers/dri/sis/sis_texstate.c
+++ b/src/mesa/drivers/dri/sis/sis_texstate.c
@@ -457,10 +457,10 @@ sis_set_texobj_parm( GLcontext *ctx, struct gl_texture_object *texObj,
{
GLubyte c[4];
- CLAMPED_FLOAT_TO_UBYTE(c[0], texObj->BorderColor[0]);
- CLAMPED_FLOAT_TO_UBYTE(c[1], texObj->BorderColor[1]);
- CLAMPED_FLOAT_TO_UBYTE(c[2], texObj->BorderColor[2]);
- CLAMPED_FLOAT_TO_UBYTE(c[3], texObj->BorderColor[3]);
+ CLAMPED_FLOAT_TO_UBYTE(c[0], texObj->BorderColor.f[0]);
+ CLAMPED_FLOAT_TO_UBYTE(c[1], texObj->BorderColor.f[1]);
+ CLAMPED_FLOAT_TO_UBYTE(c[2], texObj->BorderColor.f[2]);
+ CLAMPED_FLOAT_TO_UBYTE(c[3], texObj->BorderColor.f[3]);
current->texture[hw_unit].hwTextureBorderColor =
PACK_COLOR_8888(c[3], c[0], c[1], c[2]);
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
index 18729d5ae0..a3b1775e90 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_pixels.c
@@ -611,10 +611,10 @@ tdfx_drawpixels_R8G8B8A8(GLcontext * ctx, GLint x, GLint y,
ctx->Fog.Enabled ||
ctx->Scissor.Enabled ||
ctx->Stencil._Enabled ||
- !ctx->Color.ColorMask[0] ||
- !ctx->Color.ColorMask[1] ||
- !ctx->Color.ColorMask[2] ||
- !ctx->Color.ColorMask[3] ||
+ !ctx->Color.ColorMask[0][0] ||
+ !ctx->Color.ColorMask[0][1] ||
+ !ctx->Color.ColorMask[0][2] ||
+ !ctx->Color.ColorMask[0][3] ||
ctx->Color.ColorLogicOpEnabled ||
ctx->Texture._EnabledUnits ||
fxMesa->Fallback)
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_render.c b/src/mesa/drivers/dri/tdfx/tdfx_render.c
index 2cd8e12d95..79d63f72ac 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_render.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_render.c
@@ -76,8 +76,8 @@ static void tdfxClear( GLcontext *ctx, GLbitfield mask )
if (fxMesa->glCtx->Visual.redBits != 8) {
/* can only do color masking if running in 24/32bpp on Napalm */
- if (ctx->Color.ColorMask[RCOMP] != ctx->Color.ColorMask[GCOMP] ||
- ctx->Color.ColorMask[GCOMP] != ctx->Color.ColorMask[BCOMP]) {
+ if (ctx->Color.ColorMask[0][RCOMP] != ctx->Color.ColorMask[0][GCOMP] ||
+ ctx->Color.ColorMask[0][GCOMP] != ctx->Color.ColorMask[0][BCOMP]) {
softwareMask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
mask &= ~(BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT);
}
@@ -721,7 +721,7 @@ void tdfxEmitHwStateLocked( tdfxContextPtr fxMesa )
fxMesa->Glide.grColorMask( fxMesa->Color.ColorMask[RCOMP] ||
fxMesa->Color.ColorMask[GCOMP] ||
fxMesa->Color.ColorMask[BCOMP],
- /*fxMesa->Color.ColorMask[ACOMP]*/GL_FALSE/*[dBorca] no-no*/ );
+ /*fxMesa->Color.ColorMask[0][ACOMP]*/GL_FALSE/*[dBorca] no-no*/ );
}
fxMesa->dirty &= ~TDFX_UPLOAD_COLOR_MASK;
}
diff --git a/src/mesa/drivers/dri/tdfx/tdfx_tex.c b/src/mesa/drivers/dri/tdfx/tdfx_tex.c
index 0aa09e733b..e31ae97b02 100644
--- a/src/mesa/drivers/dri/tdfx/tdfx_tex.c
+++ b/src/mesa/drivers/dri/tdfx/tdfx_tex.c
@@ -1572,7 +1572,7 @@ tdfxCompressedTexImage2D (GLcontext *ctx, GLenum target,
tdfxTexInfo *ti;
tdfxMipMapLevel *mml;
gl_format mesaFormat;
- GLuint compressedSize;
+ GLuint compressedSize = 0;
if (TDFX_DEBUG & DEBUG_VERBOSE_DRI) {
fprintf(stderr, "tdfxCompressedTexImage2D: id=%d int 0x%x %dx%d\n",
diff --git a/src/mesa/drivers/dri/unichrome/via_state.c b/src/mesa/drivers/dri/unichrome/via_state.c
index 840e4e42da..1698230952 100644
--- a/src/mesa/drivers/dri/unichrome/via_state.c
+++ b/src/mesa/drivers/dri/unichrome/via_state.c
@@ -891,10 +891,10 @@ static GLboolean viaChooseTextureState(GLcontext *ctx)
if (texObj->Image[0][texObj->BaseLevel]->Border > 0) {
vmesa->regHTXnTB[0] |= (HC_HTXnTB_TBC_S | HC_HTXnTB_TBC_T);
vmesa->regHTXnTBC[0] =
- PACK_COLOR_888(FLOAT_TO_UBYTE(texObj->BorderColor[0]),
- FLOAT_TO_UBYTE(texObj->BorderColor[1]),
- FLOAT_TO_UBYTE(texObj->BorderColor[2]));
- vmesa->regHTXnTRAH[0] = FLOAT_TO_UBYTE(texObj->BorderColor[3]);
+ PACK_COLOR_888(FLOAT_TO_UBYTE(texObj->BorderColor.f[0]),
+ FLOAT_TO_UBYTE(texObj->BorderColor.f[1]),
+ FLOAT_TO_UBYTE(texObj->BorderColor.f[2]));
+ vmesa->regHTXnTRAH[0] = FLOAT_TO_UBYTE(texObj->BorderColor.f[3]);
}
if (texUnit0->LodBias != 0.0f) {
@@ -924,10 +924,10 @@ static GLboolean viaChooseTextureState(GLcontext *ctx)
if (texObj->Image[0][texObj->BaseLevel]->Border > 0) {
vmesa->regHTXnTB[1] |= (HC_HTXnTB_TBC_S | HC_HTXnTB_TBC_T);
vmesa->regHTXnTBC[1] =
- PACK_COLOR_888(FLOAT_TO_UBYTE(texObj->BorderColor[0]),
- FLOAT_TO_UBYTE(texObj->BorderColor[1]),
- FLOAT_TO_UBYTE(texObj->BorderColor[2]));
- vmesa->regHTXnTRAH[1] = FLOAT_TO_UBYTE(texObj->BorderColor[3]);
+ PACK_COLOR_888(FLOAT_TO_UBYTE(texObj->BorderColor.f[0]),
+ FLOAT_TO_UBYTE(texObj->BorderColor.f[1]),
+ FLOAT_TO_UBYTE(texObj->BorderColor.f[2]));
+ vmesa->regHTXnTRAH[1] = FLOAT_TO_UBYTE(texObj->BorderColor.f[3]);
}
@@ -1238,12 +1238,12 @@ static void viaChooseColorState(GLcontext *ctx)
else
vmesa->regHROP = HC_HROP_P;
- vmesa->regHFBBMSKL = PACK_COLOR_888(ctx->Color.ColorMask[0],
- ctx->Color.ColorMask[1],
- ctx->Color.ColorMask[2]);
- vmesa->regHROP |= ctx->Color.ColorMask[3];
+ vmesa->regHFBBMSKL = PACK_COLOR_888(ctx->Color.ColorMask[0][0],
+ ctx->Color.ColorMask[0][1],
+ ctx->Color.ColorMask[0][2]);
+ vmesa->regHROP |= ctx->Color.ColorMask[0][3];
- if (ctx->Color.ColorMask[3])
+ if (ctx->Color.ColorMask[0][3])
vmesa->regEnable |= HC_HenAW_MASK;
else
vmesa->regEnable &= ~HC_HenAW_MASK;