r300/program_pair: Introduce driver-specific texture instruction structure

This is to prepare more experimentation and possible internal changes in the
compiler.

Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>

4 files changed, 61 insertions, 22 deletions

diff --git a/src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c b/src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c
index 1cfb565b6e..1aeba8f498 100644
--- a/src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c
+++ b/src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c
@@ -272,7 +272,7 @@ static GLboolean begin_tex(void* data)
 }
 
 
-static GLboolean emit_tex(void* data, struct prog_instruction* inst)
+static GLboolean emit_tex(void* data, struct radeon_pair_texture_instruction* inst)
 {
 	PROG_CODE;
 
@@ -282,31 +282,31 @@ static GLboolean emit_tex(void* data, struct prog_instruction* inst)
 	}
 
 	GLuint unit = inst->TexSrcUnit;
-	GLuint dest = inst->DstReg.Index;
+	GLuint dest = inst->DestIndex;
 	GLuint opcode;
 
 	switch(inst->Opcode) {
-	case OPCODE_KIL: opcode = R300_TEX_OP_KIL; break;
-	case OPCODE_TEX: opcode = R300_TEX_OP_LD; break;
-	case OPCODE_TXB: opcode = R300_TEX_OP_TXB; break;
-	case OPCODE_TXP: opcode = R300_TEX_OP_TXP; break;
+	case RADEON_OPCODE_KIL: opcode = R300_TEX_OP_KIL; break;
+	case RADEON_OPCODE_TEX: opcode = R300_TEX_OP_LD; break;
+	case RADEON_OPCODE_TXB: opcode = R300_TEX_OP_TXB; break;
+	case RADEON_OPCODE_TXP: opcode = R300_TEX_OP_TXP; break;
 	default:
 		error("Unknown texture opcode %i", inst->Opcode);
 		return GL_FALSE;
 	}
 
-	if (inst->Opcode == OPCODE_KIL) {
+	if (inst->Opcode == RADEON_OPCODE_KIL) {
 		unit = 0;
 		dest = 0;
 	} else {
 		use_temporary(code, dest);
 	}
 
-	use_temporary(code, inst->SrcReg[0].Index);
+	use_temporary(code, inst->SrcIndex);
 
 	code->node[code->cur_node].tex_end++;
 	code->tex.inst[code->tex.length++] =
-		(inst->SrcReg[0].Index << R300_SRC_ADDR_SHIFT) |
+		(inst->SrcIndex << R300_SRC_ADDR_SHIFT) |
 		(dest << R300_DST_ADDR_SHIFT) |
 		(unit << R300_TEX_ID_SHIFT) |
 		(opcode << R300_TEX_INST_SHIFT);
diff --git a/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c b/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
index 237489e119..b5f665b66c 100644
--- a/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
+++ b/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
@@ -236,19 +236,19 @@ static GLboolean emit_paired(void *data, struct radeon_pair_instruction *inst)
 	return GL_TRUE;
 }
 
-static GLuint translate_strq_swizzle(struct prog_src_register src)
+static GLuint translate_strq_swizzle(GLuint swizzle)
 {
 	GLuint swiz = 0;
 	int i;
 	for (i = 0; i < 4; i++)
-		swiz |= (GET_SWZ(src.Swizzle, i) & 0x3) << i*2;
+		swiz |= (GET_SWZ(swizzle, i) & 0x3) << i*2;
 	return swiz;
 }
 
 /**
  * Emit a single TEX instruction
  */
-static GLboolean emit_tex(void *data, struct prog_instruction *inst)
+static GLboolean emit_tex(void *data, struct radeon_pair_texture_instruction *inst)
 {
 	PROG_CODE;
 
@@ -260,7 +260,7 @@ static GLboolean emit_tex(void *data, struct prog_instruction *inst)
 	int ip = ++code->inst_end;
 
 	code->inst[ip].inst0 = R500_INST_TYPE_TEX
-		| (inst->DstReg.WriteMask << 11)
+		| (inst->WriteMask << 11)
 		| R500_INST_TEX_SEM_WAIT;
 	code->inst[ip].inst1 = R500_TEX_ID(inst->TexSrcUnit)
 		| R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED;
@@ -269,25 +269,25 @@ static GLboolean emit_tex(void *data, struct prog_instruction *inst)
 	        code->inst[ip].inst1 |= R500_TEX_UNSCALED;
 
 	switch (inst->Opcode) {
-	case OPCODE_KIL:
+	case RADEON_OPCODE_KIL:
 		code->inst[ip].inst1 |= R500_TEX_INST_TEXKILL;
 		break;
-	case OPCODE_TEX:
+	case RADEON_OPCODE_TEX:
 		code->inst[ip].inst1 |= R500_TEX_INST_LD;
 		break;
-	case OPCODE_TXB:
+	case RADEON_OPCODE_TXB:
 		code->inst[ip].inst1 |= R500_TEX_INST_LODBIAS;
 		break;
-	case OPCODE_TXP:
+	case RADEON_OPCODE_TXP:
 		code->inst[ip].inst1 |= R500_TEX_INST_PROJ;
 		break;
 	default:
 		error("emit_tex can't handle opcode %x\n", inst->Opcode);
 	}
 
-	code->inst[ip].inst2 = R500_TEX_SRC_ADDR(inst->SrcReg[0].Index)
-		| (translate_strq_swizzle(inst->SrcReg[0]) << 8)
-		| R500_TEX_DST_ADDR(inst->DstReg.Index)
+	code->inst[ip].inst2 = R500_TEX_SRC_ADDR(inst->SrcIndex)
+		| (translate_strq_swizzle(inst->SrcSwizzle) << 8)
+		| R500_TEX_DST_ADDR(inst->DestIndex)
 		| R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G
 		| R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A;
 
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.c b/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.c
index 6ce6b4d8ff..3274c83d4d 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.c
@@ -602,7 +602,25 @@ static void emit_all_tex(struct pair_state *s)
 			_mesa_print_instruction(inst);
 			fflush(stdout);
 		}
-		s->Error = s->Error || !s->Handler->EmitTex(s->UserData, inst);
+
+		struct radeon_pair_texture_instruction rpti;
+
+		switch(inst->Opcode) {
+		case OPCODE_TEX: rpti.Opcode = RADEON_OPCODE_TEX; break;
+		case OPCODE_TXB: rpti.Opcode = RADEON_OPCODE_TXB; break;
+		case OPCODE_TXP: rpti.Opcode = RADEON_OPCODE_TXP; break;
+		default:
+		case OPCODE_KIL: rpti.Opcode = RADEON_OPCODE_KIL; break;
+		}
+
+		rpti.DestIndex = inst->DstReg.Index;
+		rpti.WriteMask = inst->DstReg.WriteMask;
+		rpti.TexSrcUnit = inst->TexSrcUnit;
+		rpti.TexSrcTarget = inst->TexSrcTarget;
+		rpti.SrcIndex = inst->SrcReg[0].Index;
+		rpti.SrcSwizzle = inst->SrcReg[0].Swizzle;
+
+		s->Error = s->Error || !s->Handler->EmitTex(s->UserData, &rpti);
 	}
 
 	if (s->Debug)
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.h b/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.h
index 4624a24629..f203d4886f 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.h
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_pair.h
@@ -82,6 +82,27 @@ struct radeon_pair_instruction {
 };
 
 
+enum {
+	RADEON_OPCODE_TEX = 0,
+	RADEON_OPCODE_TXB,
+	RADEON_OPCODE_TXP,
+	RADEON_OPCODE_KIL
+};
+
+struct radeon_pair_texture_instruction {
+	GLuint Opcode:2; /**< one of RADEON_OPCODE_xxx */
+
+	GLuint DestIndex:8;
+	GLuint WriteMask:4;
+
+	GLuint TexSrcUnit:5;
+	GLuint TexSrcTarget:3;
+
+	GLuint SrcIndex:8;
+	GLuint SrcSwizzle:12;
+};
+
+
 /**
  *
  */
@@ -107,7 +128,7 @@ struct radeon_pair_handler {
 	 *
 	 * @return GL_FALSE on error.
 	 */
-	GLboolean (*EmitTex)(void*, struct prog_instruction*);
+	GLboolean (*EmitTex)(void*, struct radeon_pair_texture_instruction*);
 
 	/**
 	 * Called before a block of contiguous, independent texture