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authorKeith Whitwell <keith@tungstengraphics.com>2006-09-20 15:04:05 +0000
committerKeith Whitwell <keith@tungstengraphics.com>2006-09-20 15:04:05 +0000
commit4f17378ec32844a483c45252ebd76fa892b8aca7 (patch)
treea03c458769c28c61bb8f5760778103a6bbe10521 /src/mesa/drivers
parentf1d6ad6fe2e7813fcb236d63ccddfdf58f8c2f37 (diff)
Add a comment about the interactions of negative pitches, overlapping
blits and the different ways of specifying a blit on this hardware.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index c57618b388..c0d6983bd1 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -288,6 +288,14 @@ void intelEmitCopyBlit( struct intel_context *intel,
/* Initial y values don't seem to work with negative pitches. If
* we adjust the offsets manually (below), it seems to work fine.
+ *
+ * However, on broadwater at least, only the top version works
+ * correctly with overlapping blits. Luckily we don't need
+ * negative pitches and overlapping blits at the same time, as far
+ * as I know anyhow.
+ *
+ * Further, the current i965 driver never requires negative
+ * pitches, so just use the old-style blits for now.
*/
if (1) {
BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);