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authorEric Anholt <eric@anholt.net>2010-12-03 16:50:19 -0800
committerEric Anholt <eric@anholt.net>2010-12-06 00:14:23 -0800
commit3f8bcb0d998820594ea288e4607462fa4479859f (patch)
tree2f30f03757e1f7297c7f56f5d0d70bcc3ca4ab6b /src/mesa/drivers
parent237aa33c67039f6660cac19f061057250b8b3697 (diff)
i965: Align gen6 push constant size to dispatch width.
The FS backend is fine with register level granularity. But for the brw_wm_emit.c backend, it expects pairs of regs to be used for the constants, because the whole world is pairs of regs. If an odd number got used, we went looking for interpolation in the wrong place.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 0d839de10d..8968caef51 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -105,7 +105,8 @@ upload_wm_state(struct brw_context *brw)
(5 - 2));
OUT_RELOC(brw->wm.push_const_bo,
I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */
- ALIGN(brw->wm.prog_data->nr_params, 8) / 8 - 1);
+ ALIGN(brw->wm.prog_data->nr_params,
+ brw->wm.prog_data->dispatch_width) / 8 - 1);
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);