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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-06-12 21:19:38 -0700
committerEric Anholt <eric@anholt.net>2010-06-12 21:47:31 -0700
commit7ba2ecb32bb80ac67a41c63ddea1846105aaf910 (patch)
tree8d98569b1700a1b6562d1aa2657bf09bb6bd2b39 /src/mesa/drivers
parent0f59b9a95d21dc79e98bce4ece3eab19e32ca80a (diff)
i965: Set the correct WM GRF start reg on gen6.
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 1eb17ca627..ed1a72f03b 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -98,7 +98,8 @@ upload_wm_state(struct brw_context *brw)
/* CACHE_NEW_SAMPLER */
dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
- dw4 |= (1 << GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
+ dw4 |= (brw->wm.prog_data->first_curbe_grf <<
+ GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
dw5 |= (40 - 1) << GEN6_WM_MAX_THREADS_SHIFT;
dw5 |= GEN6_WM_DISPATCH_ENABLE;