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authorAlberto Milone <alberto.milone@canonical.com>2010-12-02 13:34:35 +0100
committerAlex Deucher <alexdeucher@gmail.com>2011-01-11 14:48:44 -0500
commitca8960234e0a727f46fcf8af1a9b7fa2ff0451dd (patch)
treedd1a0be18c41a2d130d3e985633ed54ebb29ac56 /src/mesa/drivers
parent0865af4b42bc82816f751e3a96971375f2adbfb4 (diff)
r600c: add evergreen ARL support.
Signed-off-by: Alberto Milone <alberto.milone@canonical.com>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/r600/r700_assembler.c83
1 files changed, 69 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index bee9c3bc6d..024853c1be 100644
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -481,6 +481,8 @@ unsigned int EG_GetNumOperands(GLuint opcode, GLuint nIsOp3)
case EG_OP2_INST_FLT_TO_INT:
case EG_OP2_INST_SIN:
case EG_OP2_INST_COS:
+ case EG_OP2_INST_FLT_TO_INT_FLOOR:
+ case EG_OP2_INST_MOVA_INT:
return 1;
default: radeon_error(
@@ -3297,23 +3299,76 @@ GLboolean assemble_ARL(r700_AssemblerBase *pAsm)
return GL_FALSE;
}
- pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
- setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
- pAsm->D.dst.rtype = DST_REG_TEMPORARY;
- pAsm->D.dst.reg = 0;
- pAsm->D.dst.writex = 0;
- pAsm->D.dst.writey = 0;
- pAsm->D.dst.writez = 0;
- pAsm->D.dst.writew = 0;
-
- if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ if(8 == pAsm->unAsic)
{
- return GL_FALSE;
- }
+ /* Evergreen */
- if( GL_FALSE == next_ins(pAsm) )
+ /* Float to Signed Integer Using FLOOR */
+ pAsm->D.dst.opcode = EG_OP2_INST_FLT_TO_INT_FLOOR;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
+
+ /* Copy Signed Integer To Integer in AR and GPR */
+ pAsm->D.dst.opcode = EG_OP2_INST_MOVA_INT;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
+ }
+ else
{
- return GL_FALSE;
+ /* r6xx/r7xx */
+
+ /* Truncate floating-point to the nearest integer
+ in the range [-256, +255], and copy to AR and
+ to a GPR.
+ */
+ pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
+ setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+ pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+ pAsm->D.dst.reg = 0;
+ pAsm->D.dst.writex = 0;
+ pAsm->D.dst.writey = 0;
+ pAsm->D.dst.writez = 0;
+ pAsm->D.dst.writew = 0;
+
+ if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+ {
+ return GL_FALSE;
+ }
+
+ if( GL_FALSE == next_ins(pAsm) )
+ {
+ return GL_FALSE;
+ }
}
return GL_TRUE;