Merge branch 'upstream-gallium-0.1' into darktama-gallium-0.1

15 files changed, 296 insertions, 3600 deletions

diff --git a/src/mesa/pipe/i965simple/Makefile b/src/mesa/pipe/i965simple/Makefile
index 460bc52c35..eda5afaea5 100644
--- a/src/mesa/pipe/i965simple/Makefile
+++ b/src/mesa/pipe/i965simple/Makefile
@@ -28,8 +28,6 @@ DRIVER_SOURCES = \
 	brw_gs_emit.c \
 	brw_gs_state.c \
 	brw_misc_state.c \
-	brw_program.c \
-        brw_regions.c \
 	brw_sf.c \
 	brw_sf_emit.c \
 	brw_sf_state.c \
@@ -38,7 +36,6 @@ DRIVER_SOURCES = \
 	brw_state_cache.c \
 	brw_state_pool.c \
 	brw_state_upload.c \
-	brw_tex.c \
 	brw_tex_layout.c \
 	brw_urb.c \
 	brw_util.c \
@@ -48,14 +45,8 @@ DRIVER_SOURCES = \
 	brw_vs_state.c \
 	brw_vtbl.c \
 	brw_wm.c \
-	brw_wm_debug.c \
-	brw_wm_emit.c \
-	brw_wm_fp.c \
 	brw_wm_iz.c \
 	brw_wm_glsl.c \
-	brw_wm_pass0.c \
-	brw_wm_pass1.c \
-	brw_wm_pass2.c \
 	brw_wm_sampler_state.c \
 	brw_wm_state.c \
 	brw_wm_surface_state.c
diff --git a/src/mesa/pipe/i965simple/brw_context.c b/src/mesa/pipe/i965simple/brw_context.c
index 13bed97ff2..e69ba6938e 100644
--- a/src/mesa/pipe/i965simple/brw_context.c
+++ b/src/mesa/pipe/i965simple/brw_context.c
@@ -134,7 +134,7 @@ brw_get_paramf(struct pipe_context *pipe, int param)
 
 static boolean
 brw_is_format_supported( struct pipe_context *pipe,
-                          uint format )
+                          enum pipe_format format, uint type )
 {
 #if 0
    /* XXX: This is broken -- rewrite if still needed. */
@@ -190,6 +190,8 @@ brw_is_format_supported( struct pipe_context *pipe,
    case PIPE_FORMAT_R5G6B5_UNORM:
    case PIPE_FORMAT_S8Z24_UNORM:
       return TRUE;
+   default:
+      return FALSE;
    };
    return FALSE;
 #endif
diff --git a/src/mesa/pipe/i965simple/brw_metaops.c b/src/mesa/pipe/i965simple/brw_metaops.c
deleted file mode 100644
index 09f5d28961..0000000000
--- a/src/mesa/pipe/i965simple/brw_metaops.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  *   frame buffer texture by Gary Wong <gtw@gnu.org>
-  */
-
-
-#include "brw_context.h"
-#include "brw_defines.h"
-#include "brw_draw.h"
-
-#if 0
-
-#define INIT(brw, STRUCT, ATTRIB) 		\
-do {						\
-   brw->attribs.ATTRIB = &ctx->ATTRIB;		\
-} while (0)
-
-#define DUP(brw, STRUCT, ATTRIB) 		\
-do {						\
-   brw->metaops.attribs.ATTRIB = MALLOC_STRUCT(STRUCT);	\
-   memcpy(brw->metaops.attribs.ATTRIB, 			\
-	  brw->attribs.ATTRIB,			\
-	  sizeof(struct STRUCT));		\
-} while (0)
-
-
-#define INSTALL(brw, ATTRIB, STATE)		\
-do {						\
-   brw->attribs.ATTRIB = brw->metaops.attribs.ATTRIB;	\
-   brw->state.dirty.mesa |= STATE;		\
-} while (0)
-
-#define RESTORE(brw, ATTRIB, STATE)			\
-do {							\
-   brw->attribs.ATTRIB = &brw->intel.ctx.ATTRIB;	\
-   brw->state.dirty.mesa |= STATE;			\
-} while (0)
-
-static void init_attribs( struct brw_context *brw )
-{
-   DUP(brw, gl_colorbuffer_attrib, Color);
-   DUP(brw, gl_depthbuffer_attrib, Depth);
-   DUP(brw, gl_fog_attrib, Fog);
-   DUP(brw, gl_hint_attrib, Hint);
-   DUP(brw, gl_light_attrib, Light);
-   DUP(brw, gl_line_attrib, Line);
-   DUP(brw, gl_point_attrib, Point);
-   DUP(brw, gl_polygon_attrib, Polygon);
-   DUP(brw, gl_scissor_attrib, Scissor);
-   DUP(brw, gl_stencil_attrib, Stencil);
-   DUP(brw, gl_texture_attrib, Texture);
-   DUP(brw, gl_transform_attrib, Transform);
-   DUP(brw, gl_viewport_attrib, Viewport);
-   DUP(brw, gl_vertex_program_state, VertexProgram);
-   DUP(brw, gl_fragment_program_state, FragmentProgram);
-}
-
-static void install_attribs( struct brw_context *brw )
-{
-   INSTALL(brw, Color, _NEW_COLOR);
-   INSTALL(brw, Depth, _NEW_DEPTH);
-   INSTALL(brw, Fog, _NEW_FOG);
-   INSTALL(brw, Hint, _NEW_HINT);
-   INSTALL(brw, Light, _NEW_LIGHT);
-   INSTALL(brw, Line, _NEW_LINE);
-   INSTALL(brw, Point, _NEW_POINT);
-   INSTALL(brw, Polygon, _NEW_POLYGON);
-   INSTALL(brw, Scissor, _NEW_SCISSOR);
-   INSTALL(brw, Stencil, _NEW_STENCIL);
-   INSTALL(brw, Texture, _NEW_TEXTURE);
-   INSTALL(brw, Transform, _NEW_TRANSFORM);
-   INSTALL(brw, Viewport, _NEW_VIEWPORT);
-   INSTALL(brw, VertexProgram, _NEW_PROGRAM);
-   INSTALL(brw, FragmentProgram, _NEW_PROGRAM);
-}
-
-static void restore_attribs( struct brw_context *brw )
-{
-   RESTORE(brw, Color, _NEW_COLOR);
-   RESTORE(brw, Depth, _NEW_DEPTH);
-   RESTORE(brw, Fog, _NEW_FOG);
-   RESTORE(brw, Hint, _NEW_HINT);
-   RESTORE(brw, Light, _NEW_LIGHT);
-   RESTORE(brw, Line, _NEW_LINE);
-   RESTORE(brw, Point, _NEW_POINT);
-   RESTORE(brw, Polygon, _NEW_POLYGON);
-   RESTORE(brw, Scissor, _NEW_SCISSOR);
-   RESTORE(brw, Stencil, _NEW_STENCIL);
-   RESTORE(brw, Texture, _NEW_TEXTURE);
-   RESTORE(brw, Transform, _NEW_TRANSFORM);
-   RESTORE(brw, Viewport, _NEW_VIEWPORT);
-   RESTORE(brw, VertexProgram, _NEW_PROGRAM);
-   RESTORE(brw, FragmentProgram, _NEW_PROGRAM);
-}
-
-
-static const char *vp_prog =
-      "!!ARBvp1.0\n"
-      "MOV  result.color, vertex.color;\n"
-      "MOV  result.position, vertex.position;\n"
-      "END\n";
-
-static const char *fp_prog =
-      "!!ARBfp1.0\n"
-      "MOV result.color, fragment.color;\n"
-      "END\n";
-
-static const char *fp_tex_prog =
-      "!!ARBfp1.0\n"
-      "TEMP a;\n"
-      "ADD a, fragment.position, program.local[0];\n"
-      "MUL a, a, program.local[1];\n"
-      "TEX result.color, a, texture[0], 2D;\n"
-      "MOV result.depth.z, fragment.position;\n"
-      "END\n";
-
-/* Derived values of importance:
- *
- *   FragmentProgram->_Current
- *   VertexProgram->_Enabled
- *   brw->vertex_program
- *   DrawBuffer->_ColorDrawBufferMask[0]
- *
- *
- * More if drawpixels-through-texture is added.
- */
-static void init_metaops_state( struct brw_context *brw )
-{
-   GLcontext *ctx = &brw->intel.ctx;
-
-   brw->metaops.vbo = ctx->Driver.NewBufferObject(ctx, 1, GL_ARRAY_BUFFER_ARB);
-
-   ctx->Driver.BufferData(ctx,
-			  GL_ARRAY_BUFFER_ARB,
-			  4096,
-			  NULL,
-			  GL_DYNAMIC_DRAW_ARB,
-			  brw->metaops.vbo);
-
-   brw->metaops.fp = (struct gl_fragment_program *)
-      ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, 1 );
-
-   brw->metaops.fp_tex = (struct gl_fragment_program *)
-      ctx->Driver.NewProgram(ctx, GL_FRAGMENT_PROGRAM_ARB, 1 );
-
-   brw->metaops.vp = (struct gl_vertex_program *)
-      ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 1 );
-
-   _mesa_parse_arb_fragment_program(ctx, GL_FRAGMENT_PROGRAM_ARB,
-				    fp_prog, strlen(fp_prog),
-				    brw->metaops.fp);
-
-   _mesa_parse_arb_fragment_program(ctx, GL_FRAGMENT_PROGRAM_ARB,
-				    fp_tex_prog, strlen(fp_tex_prog),
-				    brw->metaops.fp_tex);
-
-   _mesa_parse_arb_vertex_program(ctx, GL_VERTEX_PROGRAM_ARB,
-				  vp_prog, strlen(vp_prog),
-				  brw->metaops.vp);
-
-   brw->metaops.attribs.VertexProgram->Current = brw->metaops.vp;
-   brw->metaops.attribs.VertexProgram->_Enabled = TRUE;
-
-   brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp;
-}
-
-static void meta_flat_shade( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.Raster->flatshade = TRUE;
-   brw->state.dirty.mesa |= _NEW_LIGHT;
-}
-
-
-static void meta_no_stencil_write( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.Stencil->Enabled = FALSE;
-   brw->metaops.attribs.Stencil->WriteMask[0] = FALSE;
-   brw->state.dirty.mesa |= _NEW_STENCIL;
-}
-
-static void meta_no_depth_write( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.Depth->Test = FALSE;
-   brw->metaops.attribs.Depth->Mask = FALSE;
-   brw->state.dirty.mesa |= _NEW_DEPTH;
-}
-
-
-static void meta_depth_replace( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   /* ctx->Driver.Enable( ctx, GL_DEPTH_TEST, TRUE )
-    * ctx->Driver.DepthMask( ctx, TRUE )
-    */
-   brw->metaops.attribs.Depth->Test = TRUE;
-   brw->metaops.attribs.Depth->Mask = TRUE;
-   brw->state.dirty.mesa |= _NEW_DEPTH;
-
-   /* ctx->Driver.DepthFunc( ctx, GL_ALWAYS )
-    */
-   brw->metaops.attribs.Depth->Func = GL_ALWAYS;
-
-   brw->state.dirty.mesa |= _NEW_DEPTH;
-}
-
-
-static void meta_stencil_replace( struct intel_context *intel,
-				 unsigned s_mask,
-				 unsigned s_clear)
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.Stencil->Enabled = TRUE;
-   brw->metaops.attribs.Stencil->WriteMask[0] = s_mask;
-   brw->metaops.attribs.Stencil->ValueMask[0] = 0xff;
-   brw->metaops.attribs.Stencil->Ref[0] = s_clear;
-   brw->metaops.attribs.Stencil->Function[0] = GL_ALWAYS;
-   brw->metaops.attribs.Stencil->FailFunc[0] = GL_REPLACE;
-   brw->metaops.attribs.Stencil->ZPassFunc[0] = GL_REPLACE;
-   brw->metaops.attribs.Stencil->ZFailFunc[0] = GL_REPLACE;
-   brw->state.dirty.mesa |= _NEW_STENCIL;
-}
-
-
-static void meta_color_mask( struct intel_context *intel, boolean state )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   if (state)
-      COPY_4V(brw->metaops.attribs.Color->ColorMask,
-	      brw->intel.ctx.Color.ColorMask);
-   else
-      ASSIGN_4V(brw->metaops.attribs.Color->ColorMask, 0, 0, 0, 0);
-
-   brw->state.dirty.mesa |= _NEW_COLOR;
-}
-
-static void meta_no_texture( struct intel_context *intel )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp;
-
-   brw->metaops.attribs.Texture->CurrentUnit = 0;
-   brw->metaops.attribs.Texture->_EnabledUnits = 0;
-   brw->metaops.attribs.Texture->_EnabledCoordUnits = 0;
-   brw->metaops.attribs.Texture->Unit[ 0 ].Enabled = 0;
-   brw->metaops.attribs.Texture->Unit[ 0 ]._ReallyEnabled = 0;
-
-   brw->state.dirty.mesa |= _NEW_TEXTURE | _NEW_PROGRAM;
-}
-
-static void meta_texture_blend_replace(struct intel_context *intel)
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   brw->metaops.attribs.Texture->CurrentUnit = 0;
-   brw->metaops.attribs.Texture->_EnabledUnits = 1;
-   brw->metaops.attribs.Texture->_EnabledCoordUnits = 1;
-   brw->metaops.attribs.Texture->Unit[ 0 ].Enabled = TEXTURE_2D_BIT;
-   brw->metaops.attribs.Texture->Unit[ 0 ]._ReallyEnabled = TEXTURE_2D_BIT;
-   brw->metaops.attribs.Texture->Unit[ 0 ].Current2D =
-      intel->frame_buffer_texobj;
-   brw->metaops.attribs.Texture->Unit[ 0 ]._Current =
-      intel->frame_buffer_texobj;
-
-   brw->state.dirty.mesa |= _NEW_TEXTURE | _NEW_PROGRAM;
-}
-
-static void meta_import_pixel_state(struct intel_context *intel)
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   RESTORE(brw, Color, _NEW_COLOR);
-   RESTORE(brw, Depth, _NEW_DEPTH);
-   RESTORE(brw, Fog, _NEW_FOG);
-   RESTORE(brw, Scissor, _NEW_SCISSOR);
-   RESTORE(brw, Stencil, _NEW_STENCIL);
-   RESTORE(brw, Texture, _NEW_TEXTURE);
-   RESTORE(brw, FragmentProgram, _NEW_PROGRAM);
-}
-
-static void meta_frame_buffer_texture( struct intel_context *intel,
-				       int xoff, int yoff )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-   struct intel_region *region = intel_drawbuf_region( intel );
-
-   INSTALL(brw, FragmentProgram, _NEW_PROGRAM);
-
-   brw->metaops.attribs.FragmentProgram->_Current = brw->metaops.fp_tex;
-   /* This is unfortunate, but seems to be necessary, since later on we
-      will end up calling _mesa_load_state_parameters to lookup the
-      local params (below), and that will want to look in ctx.FragmentProgram
-      instead of brw->attribs.FragmentProgram. */
-   intel->ctx.FragmentProgram.Current = brw->metaops.fp_tex;
-
-   brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 0 ] = xoff;
-   brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 1 ] = yoff;
-   brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 2 ] = 0.0;
-   brw->metaops.fp_tex->Base.LocalParams[ 0 ][ 3 ] = 0.0;
-   brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 0 ] =
-      1.0 / region->pitch;
-   brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 1 ] =
-      -1.0 / region->height;
-   brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 2 ] = 0.0;
-   brw->metaops.fp_tex->Base.LocalParams[ 1 ][ 3 ] = 1.0;
-
-   brw->state.dirty.mesa |= _NEW_PROGRAM;
-}
-
-
-static void meta_draw_region( struct intel_context *intel,
-			     struct intel_region *draw_region,
-			     struct intel_region *depth_region )
-{
-   struct brw_context *brw = brw_context(&intel->ctx);
-
-   if (!brw->metaops.saved_draw_region) {
-      brw->metaops.saved_draw_region = brw->state.draw_region;
-      brw->metaops.saved_depth_region = brw->state.depth_region;
-   }
-
-   brw->state.draw_region = draw_region;
-   brw->state.depth_region = depth_region;
-
-   brw->state.dirty.mesa |= _NEW_BUFFERS;
-}
-
-
-static void meta_draw_quad(struct intel_context *intel,
-			   float x0, float x1,
-			   float y0, float y1,
-			   float z,
-			   ubyte red, ubyte green,
-			   ubyte blue, ubyte alpha,
-			   float s0, float s1,
-			   float t0, float t1)
-{
-   GLcontext *ctx = &intel->ctx;
-   struct brw_context *brw = brw_context(&intel->ctx);
-   struct gl_client_array pos_array;
-   struct gl_client_array color_array;
-   struct gl_client_array *attribs[PIPE_ATTRIB_MAX];
-   struct _mesa_prim prim[1];
-   float pos[4][3];
-   ubyte color[4];
-
-   ctx->Driver.BufferData(ctx,
-			  GL_ARRAY_BUFFER_ARB,
-			  sizeof(pos) + sizeof(color),
-			  NULL,
-			  GL_DYNAMIC_DRAW_ARB,
-			  brw->metaops.vbo);
-
-   pos[0][0] = x0;
-   pos[0][1] = y0;
-   pos[0][2] = z;
-
-   pos[1][0] = x1;
-   pos[1][1] = y0;
-   pos[1][2] = z;
-
-   pos[2][0] = x1;
-   pos[2][1] = y1;
-   pos[2][2] = z;
-
-   pos[3][0] = x0;
-   pos[3][1] = y1;
-   pos[3][2] = z;
-
-
-   ctx->Driver.BufferSubData(ctx,
-			     GL_ARRAY_BUFFER_ARB,
-			     0,
-			     sizeof(pos),
-			     pos,
-			     brw->metaops.vbo);
-
-   color[0] = red;
-   color[1] = green;
-   color[2] = blue;
-   color[3] = alpha;
-
-   ctx->Driver.BufferSubData(ctx,
-			     GL_ARRAY_BUFFER_ARB,
-			     sizeof(pos),
-			     sizeof(color),
-			     color,
-			     brw->metaops.vbo);
-
-   /* Ignoring texture coords.
-    */
-
-   memset(attribs, 0, PIPE_ATTRIB_MAX * sizeof(*attribs));
-
-   attribs[VERT_ATTRIB_POS] = &pos_array;
-   attribs[VERT_ATTRIB_POS]->Ptr = 0;
-   attribs[VERT_ATTRIB_POS]->Type = GL_FLOAT;
-   attribs[VERT_ATTRIB_POS]->Enabled = 1;
-   attribs[VERT_ATTRIB_POS]->Size = 3;
-   attribs[VERT_ATTRIB_POS]->StrideB = 3 * sizeof(float);
-   attribs[VERT_ATTRIB_POS]->Stride = 3 * sizeof(float);
-   attribs[VERT_ATTRIB_POS]->_MaxElement = 4;
-   attribs[VERT_ATTRIB_POS]->Normalized = 0;
-   attribs[VERT_ATTRIB_POS]->BufferObj = brw->metaops.vbo;
-
-   attribs[VERT_ATTRIB_COLOR0] = &color_array;
-   attribs[VERT_ATTRIB_COLOR0]->Ptr = (const ubyte *)sizeof(pos);
-   attribs[VERT_ATTRIB_COLOR0]->Type = GL_UNSIGNED_BYTE;
-   attribs[VERT_ATTRIB_COLOR0]->Enabled = 1;
-   attribs[VERT_ATTRIB_COLOR0]->Size = 4;
-   attribs[VERT_ATTRIB_COLOR0]->StrideB = 0;
-   attribs[VERT_ATTRIB_COLOR0]->Stride = 0;
-   attribs[VERT_ATTRIB_COLOR0]->_MaxElement = 1;
-   attribs[VERT_ATTRIB_COLOR0]->Normalized = 1;
-   attribs[VERT_ATTRIB_COLOR0]->BufferObj = brw->metaops.vbo;
-
-   /* Just ignoring texture coordinates for now.
-    */
-
-   memset(prim, 0, sizeof(*prim));
-
-   prim[0].mode = GL_TRIANGLE_FAN;
-   prim[0].begin = 1;
-   prim[0].end = 1;
-   prim[0].weak = 0;
-   prim[0].pad = 0;
-   prim[0].start = 0;
-   prim[0].count = 4;
-
-   brw_draw_prims(&brw->intel.ctx,
-		  (const struct gl_client_array **)attribs,
-		  prim, 1,
-		  NULL,
-		  0,
-		  3 );
-}
-
-
-static void install_meta_state( struct intel_context *intel )
-{
-   GLcontext *ctx = &intel->ctx;
-   struct brw_context *brw = brw_context(ctx);
-
-   if (!brw->metaops.vbo) {
-      init_metaops_state(brw);
-   }
-
-   install_attribs(brw);
-
-   meta_no_texture(&brw->intel);
-   meta_flat_shade(&brw->intel);
-   brw->metaops.restore_draw_mask = ctx->DrawBuffer->_ColorDrawBufferMask[0];
-   brw->metaops.restore_fp = ctx->FragmentProgram.Current;
-
-   /* This works without adjusting refcounts.  Fix later?
-    */
-   brw->metaops.saved_draw_region = brw->state.draw_region;
-   brw->metaops.saved_depth_region = brw->state.depth_region;
-   brw->metaops.active = 1;
-
-   brw->state.dirty.brw |= BRW_NEW_METAOPS;
-}
-
-static void leave_meta_state( struct intel_context *intel )
-{
-   GLcontext *ctx = &intel->ctx;
-   struct brw_context *brw = brw_context(ctx);
-
-   restore_attribs(brw);
-
-   ctx->DrawBuffer->_ColorDrawBufferMask[0] = brw->metaops.restore_draw_mask;
-   ctx->FragmentProgram.Current = brw->metaops.restore_fp;
-
-   brw->state.draw_region = brw->metaops.saved_draw_region;
-   brw->state.depth_region = brw->metaops.saved_depth_region;
-   brw->metaops.saved_draw_region = NULL;
-   brw->metaops.saved_depth_region = NULL;
-   brw->metaops.active = 0;
-
-   brw->state.dirty.mesa |= _NEW_BUFFERS;
-   brw->state.dirty.brw |= BRW_NEW_METAOPS;
-}
-
-
-
-void brw_init_metaops( struct brw_context *brw )
-{
-   init_attribs(brw);
-}
-
-void brw_destroy_metaops( struct brw_context *brw )
-{
-   GLcontext *ctx = &brw->intel.ctx;
-
-   if (brw->metaops.vbo)
-      ctx->Driver.DeleteBuffer( ctx, brw->metaops.vbo );
-
-/*    ctx->Driver.DeleteProgram( ctx, brw->metaops.fp ); */
-/*    ctx->Driver.DeleteProgram( ctx, brw->metaops.fp_tex ); */
-/*    ctx->Driver.DeleteProgram( ctx, brw->metaops.vp ); */
-}
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_program.c b/src/mesa/pipe/i965simple/brw_program.c
deleted file mode 100644
index c4640a2b06..0000000000
--- a/src/mesa/pipe/i965simple/brw_program.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-#include "brw_context.h"
-#include "brw_util.h"
-
-#if 0
-static void brwBindProgram( GLcontext *ctx,
-			    int target,
-			    struct gl_program *prog )
-{
-   struct brw_context *brw = brw_context(ctx);
-
-   switch (target) {
-   case GL_VERTEX_PROGRAM_ARB:
-      brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
-      break;
-   case GL_FRAGMENT_PROGRAM_ARB:
-      brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
-      break;
-   }
-}
-
-static struct gl_program *brwNewProgram( GLcontext *ctx,
-				      int target,
-				      unsigned id )
-{
-   struct brw_context *brw = brw_context(ctx);
-
-   switch (target) {
-   case GL_VERTEX_PROGRAM_ARB: {
-      struct brw_vertex_program *prog = CALLOC_STRUCT(brw_vertex_program);
-      if (prog) {
-	 prog->id = brw->program_id++;
-
-	 return _mesa_init_vertex_program( ctx, &prog->program,
-					     target, id );
-      }
-      else
-	 return NULL;
-   }
-
-   case GL_FRAGMENT_PROGRAM_ARB: {
-      struct brw_fragment_program *prog = CALLOC_STRUCT(brw_fragment_program);
-      if (prog) {
-	 prog->id = brw->program_id++;
-
-	 return _mesa_init_fragment_program( ctx, &prog->program,
-					     target, id );
-      }
-      else
-	 return NULL;
-   }
-
-   default:
-      return _mesa_new_program(ctx, target, id);
-   }
-}
-
-static void brwDeleteProgram( GLcontext *ctx,
-			      struct gl_program *prog )
-{
-
-   _mesa_delete_program( ctx, prog );
-}
-
-
-static boolean brwIsProgramNative( GLcontext *ctx,
-				     int target,
-				     struct gl_program *prog )
-{
-   return TRUE;
-}
-
-static void brwProgramStringNotify( GLcontext *ctx,
-				    int target,
-				    struct gl_program *prog )
-{
-   if (target == GL_FRAGMENT_PROGRAM_ARB) {
-      struct brw_context *brw = brw_context(ctx);
-      struct brw_fragment_program *p = (struct brw_fragment_program *)prog;
-      struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program;
-      if (p == fp)
-	 brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
-      p->id = brw->program_id++;
-      p->param_state = p->program.Base.Parameters->StateFlags;
-   }
-   else if (target == GL_VERTEX_PROGRAM_ARB) {
-      struct brw_context *brw = brw_context(ctx);
-      struct brw_vertex_program *p = (struct brw_vertex_program *)prog;
-      struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program;
-      if (p == vp)
-	 brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
-      p->id = brw->program_id++;
-      p->param_state = p->program.Base.Parameters->StateFlags;
-
-      /* Also tell tnl about it:
-       */
-      _tnl_program_string(ctx, target, prog);
-   }
-}
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_regions.c b/src/mesa/pipe/i965simple/brw_regions.c
deleted file mode 100644
index 32ad988279..0000000000
--- a/src/mesa/pipe/i965simple/brw_regions.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-
-/* Provide additional functionality on top of bufmgr buffers:
- *   - 2d semantics and blit operations (XXX: remove/simplify blits??)
- *   - refcounting of buffers for multiple images in a buffer.
- *   - refcounting of buffer mappings.
- */
-
-#include "pipe/p_defines.h"
-#include "pipe/p_winsys.h"
-#include "brw_context.h"
-#include "brw_blit.h"
-
-
diff --git a/src/mesa/pipe/i965simple/brw_regions.h b/src/mesa/pipe/i965simple/brw_regions.h
deleted file mode 100644
index 1eebd1d5ee..0000000000
--- a/src/mesa/pipe/i965simple/brw_regions.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifndef BRW_REGIONS_H
-#define BRW_REGIONS_H
-
-
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_surface.c b/src/mesa/pipe/i965simple/brw_surface.c
index b5a0318047..b0d2fec8e0 100644
--- a/src/mesa/pipe/i965simple/brw_surface.c
+++ b/src/mesa/pipe/i965simple/brw_surface.c
@@ -33,6 +33,8 @@
 #include "pipe/p_inlines.h"
 #include "pipe/p_winsys.h"
 
+#include "pipe/softpipe/sp_rgba_tile.h" /* XXX TEMPORARY */
+
 
 #define CLIP_TILE \
    do { \
@@ -47,73 +49,6 @@
    } while(0)
 
 
-/**
- * Note: this is exactly like a8r8g8b8_get_tile() in sp_surface.c
- * Share it someday.
- */
-static void
-brw_get_tile_rgba(struct pipe_context *pipe,
-                   struct pipe_surface *ps,
-                   uint x, uint y, uint w, uint h, float *p)
-{
-   const unsigned *src
-      = ((const unsigned *) (ps->map + ps->offset))
-      + y * ps->pitch + x;
-   unsigned i, j;
-   unsigned w0 = w;
-
-   CLIP_TILE;
-
-   switch (ps->format) {
-   case PIPE_FORMAT_A8R8G8B8_UNORM:
-      for (i = 0; i < h; i++) {
-         float *pRow = p;
-         for (j = 0; j < w; j++) {
-            const unsigned pixel = src[j];
-            pRow[0] = UBYTE_TO_FLOAT((pixel >> 16) & 0xff);
-            pRow[1] = UBYTE_TO_FLOAT((pixel >>  8) & 0xff);
-            pRow[2] = UBYTE_TO_FLOAT((pixel >>  0) & 0xff);
-            pRow[3] = UBYTE_TO_FLOAT((pixel >> 24) & 0xff);
-            pRow += 4;
-         }
-         src += ps->pitch;
-         p += w0 * 4;
-      }
-      break;
-   case PIPE_FORMAT_S8Z24_UNORM:
-      {
-         const float scale = 1.0f / (float) 0xffffff;
-         for (i = 0; i < h; i++) {
-            float *pRow = p;
-            for (j = 0; j < w; j++) {
-               const unsigned pixel = src[j];
-               pRow[0] =
-               pRow[1] =
-               pRow[2] =
-               pRow[3] = (pixel & 0xffffff) * scale;
-               pRow += 4;
-            }
-            src += ps->pitch;
-            p += w0 * 4;
-         }
-      }
-      break;
-   default:
-      assert(0);
-   }
-}
-
-
-static void
-brw_put_tile_rgba(struct pipe_context *pipe,
-                   struct pipe_surface *ps,
-                   uint x, uint y, uint w, uint h, const float *p)
-{
-   /* TODO */
-   assert(0);
-}
-
-
 /*
  * XXX note: same as code in sp_surface.c
  */
@@ -388,8 +323,8 @@ brw_init_surface_functions(struct brw_context *brw)
    brw->pipe.get_tex_surface = brw_get_tex_surface;
    brw->pipe.get_tile = brw_get_tile;
    brw->pipe.put_tile = brw_put_tile;
-   brw->pipe.get_tile_rgba = brw_get_tile_rgba;
-   brw->pipe.put_tile_rgba = brw_put_tile_rgba;
+   brw->pipe.get_tile_rgba = softpipe_get_tile_rgba;
+   brw->pipe.put_tile_rgba = softpipe_put_tile_rgba;
 
    brw->pipe.surface_data  = brw_surface_data;
    brw->pipe.surface_copy  = brw_surface_copy;
diff --git a/src/mesa/pipe/i965simple/brw_tex.c b/src/mesa/pipe/i965simple/brw_tex.c
deleted file mode 100644
index e9ff67c3f4..0000000000
--- a/src/mesa/pipe/i965simple/brw_tex.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-
-#include "brw_context.h"
-#include "brw_defines.h"
-
-#if 0
-void brw_FrameBufferTexInit( struct brw_context *brw )
-{
-   struct intel_context *intel = &brw->intel;
-   GLcontext *ctx = &intel->ctx;
-   struct intel_region *region = intel->intelScreen->front_region;
-   struct gl_texture_object *obj;
-   struct gl_texture_image *img;
-   
-   intel->frame_buffer_texobj = obj =
-      ctx->Driver.NewTextureObject( ctx, (unsigned) -1, GL_TEXTURE_2D );
-
-   obj->MinFilter = GL_NEAREST;
-   obj->MagFilter = GL_NEAREST;
-
-   img = ctx->Driver.NewTextureImage( ctx );
-
-   _mesa_init_teximage_fields( ctx, GL_TEXTURE_2D, img,
-			       region->pitch, region->height, 1, 0,
-			       region->cpp == 4 ? GL_RGBA : GL_RGB );
-   
-   _mesa_set_tex_image( obj, GL_TEXTURE_2D, 0, img );
-}
-
-void brw_FrameBufferTexDestroy( struct brw_context *brw )
-{
-   brw->intel.ctx.Driver.DeleteTexture( &brw->intel.ctx,
-					brw->intel.frame_buffer_texobj );
-}
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_vs_emit.c b/src/mesa/pipe/i965simple/brw_vs_emit.c
index 4121eae632..59459d4200 100644
--- a/src/mesa/pipe/i965simple/brw_vs_emit.c
+++ b/src/mesa/pipe/i965simple/brw_vs_emit.c
@@ -732,11 +732,11 @@ static struct brw_reg get_arg( struct brw_vs_compile *c,
 
 
 static struct brw_reg get_dst( struct brw_vs_compile *c,
-			       struct tgsi_dst_register dst )
+			       const struct tgsi_dst_register *dst )
 {
-   struct brw_reg reg = get_reg(c, dst.File, dst.Index);
+   struct brw_reg reg = get_reg(c, dst->File, dst->Index);
 
-   reg.dw1.bits.writemask = dst.WriteMask;
+   reg.dw1.bits.writemask = dst->WriteMask;
 
    return reg;
 }
@@ -950,14 +950,14 @@ post_vs_emit( struct brw_vs_compile *c, struct brw_instruction *end_inst )
 {
    struct tgsi_parse_context parse;
    const struct tgsi_token *tokens = c->vp->program.tokens;
-   struct brw_instruction *brw_inst1, *brw_inst2;
-   const struct tgsi_full_instruction *inst1, *inst2;
-   int offset;
    tgsi_parse_init(&parse, tokens);
    while (!tgsi_parse_end_of_tokens(&parse)) {
       tgsi_parse_token(&parse);
       if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION) {
 #if 0
+         struct brw_instruction *brw_inst1, *brw_inst2;
+         const struct tgsi_full_instruction *inst1, *inst2;
+         int offset;
          inst1 = &parse.FullToken.FullInstruction;
          brw_inst1 = inst1->Data;
          switch (inst1->Opcode) {
@@ -982,29 +982,277 @@ post_vs_emit( struct brw_vs_compile *c, struct brw_instruction *end_inst )
    tgsi_parse_free(&parse);
 }
 
+static void process_declaration(const struct tgsi_full_declaration *decl,
+                                struct brw_prog_info *info)
+{
+   switch(decl->Declaration.File) {
+   case TGSI_FILE_CONSTANT: {
+   }
+      break;
+   case TGSI_FILE_INPUT: {
+   }
+      break;
+   case TGSI_FILE_OUTPUT: {
+      if (decl->Declaration.Semantic) {
+         int idx = 0;
+         if (decl->Declaration.Declare == TGSI_DECLARE_MASK) {
+            printf("DECLARATION MASK = %d\n",
+                   decl->u.DeclarationMask.Mask);
+            assert(0);
+         } else { //range
+            idx = decl->u.DeclarationRange.First;
+         }
+         switch (decl->Semantic.SemanticName) {
+         case TGSI_SEMANTIC_POSITION: {
+            info->pos_idx = idx;
+         }
+            break;
+         case TGSI_SEMANTIC_COLOR:
+            break;
+         case TGSI_SEMANTIC_BCOLOR:
+            break;
+         case TGSI_SEMANTIC_FOG:
+            break;
+         case TGSI_SEMANTIC_PSIZE: {
+            info->writes_psize = TRUE;
+            info->psize_idx = idx;
+         }
+            break;
+         case TGSI_SEMANTIC_GENERIC:
+            break;
+         }
+      }
+   }
+      break;
+   case TGSI_FILE_TEMPORARY: {
+      info->num_temps++;
+   }
+      break;
+   case TGSI_FILE_SAMPLER: {
+   }
+      break;
+   case TGSI_FILE_ADDRESS: {
+      info->num_addrs++;
+   }
+      break;
+   case TGSI_FILE_IMMEDIATE: {
+   }
+      break;
+   case TGSI_FILE_NULL: {
+   }
+      break;
+   }
+}
+
+static void process_instruction(struct brw_vs_compile *c,
+                                struct tgsi_full_instruction *inst,
+                                struct brw_prog_info *info)
+{
+   struct brw_reg args[3], dst;
+   struct brw_compile *p = &c->func;
+   struct brw_indirect stack_index = brw_indirect(0, 0);
+   unsigned i;
+   unsigned index;
+   unsigned file;
+   /*FIXME: might not be the only one*/
+   const struct tgsi_dst_register *dst_reg = &inst->FullDstRegisters[0].DstRegister;
+   /*
+   struct brw_instruction *if_inst[MAX_IFSN];
+   unsigned insn, if_insn = 0;
+   */
+
+   /* Get argument regs.  SWZ is special and does this itself. */
+   if (inst->Instruction.Opcode != TGSI_OPCODE_SWZ)
+      for (i = 0; i < 3; i++) {
+         struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i];
+         index = src->SrcRegister.Index;
+         file = src->SrcRegister.File;
+         if (file == TGSI_FILE_OUTPUT&&c->output_regs[index].used_in_src)
+            args[i] = c->output_regs[index].reg;
+         else
+            args[i] = get_arg(c, &src->SrcRegister);
+      }
+
+   /* Get dest regs.  Note that it is possible for a reg to be both
+    * dst and arg, given the static allocation of registers.  So
+    * care needs to be taken emitting multi-operation instructions.
+    */
+   index = dst_reg->Index;
+   file = dst_reg->File;
+   if (file == TGSI_FILE_OUTPUT && c->output_regs[index].used_in_src)
+      dst = c->output_regs[index].reg;
+   else
+      dst = get_dst(c, dst_reg);
+
+   switch (inst->Instruction.Opcode) {
+   case TGSI_OPCODE_ABS:
+      brw_MOV(p, dst, brw_abs(args[0]));
+      break;
+   case TGSI_OPCODE_ADD:
+      brw_ADD(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_DP3:
+      brw_DP3(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_DP4:
+      brw_DP4(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_DPH:
+      brw_DPH(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_DST:
+      unalias2(c, dst, args[0], args[1], emit_dst_noalias);
+      break;
+   case TGSI_OPCODE_EXP:
+      unalias1(c, dst, args[0], emit_exp_noalias);
+      break;
+   case TGSI_OPCODE_EX2:
+      emit_math1(c, BRW_MATH_FUNCTION_EXP, dst, args[0], BRW_MATH_PRECISION_FULL);
+      break;
+   case TGSI_OPCODE_ARL:
+      emit_arl(c, dst, args[0]);
+      break;
+   case TGSI_OPCODE_FLR:
+      brw_RNDD(p, dst, args[0]);
+      break;
+   case TGSI_OPCODE_FRC:
+      brw_FRC(p, dst, args[0]);
+      break;
+   case TGSI_OPCODE_LOG:
+      unalias1(c, dst, args[0], emit_log_noalias);
+      break;
+   case TGSI_OPCODE_LG2:
+      emit_math1(c, BRW_MATH_FUNCTION_LOG, dst, args[0], BRW_MATH_PRECISION_FULL);
+      break;
+   case TGSI_OPCODE_LIT:
+      unalias1(c, dst, args[0], emit_lit_noalias);
+      break;
+   case TGSI_OPCODE_MAD:
+      brw_MOV(p, brw_acc_reg(), args[2]);
+      brw_MAC(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_MAX:
+      emit_max(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_MIN:
+      emit_min(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_MOV:
+#if 0
+   case TGSI_OPCODE_SWZ:
+      /* The args[0] value can't be used here as it won't have
+       * correctly encoded the full swizzle:
+       */
+      emit_swz(c, dst, inst->SrcReg[0] );
+#endif
+      brw_MOV(p, dst, args[0]);
+      break;
+   case TGSI_OPCODE_MUL:
+      brw_MUL(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_POW:
+      emit_math2(c, BRW_MATH_FUNCTION_POW, dst, args[0], args[1], BRW_MATH_PRECISION_FULL);
+      break;
+   case TGSI_OPCODE_RCP:
+      emit_math1(c, BRW_MATH_FUNCTION_INV, dst, args[0], BRW_MATH_PRECISION_FULL);
+      break;
+   case TGSI_OPCODE_RSQ:
+      emit_math1(c, BRW_MATH_FUNCTION_RSQ, dst, args[0], BRW_MATH_PRECISION_FULL);
+      break;
+
+   case TGSI_OPCODE_SEQ:
+      emit_seq(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SNE:
+      emit_sne(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SGE:
+      emit_sge(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SGT:
+      emit_sgt(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SLT:
+      emit_slt(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SLE:
+      emit_sle(p, dst, args[0], args[1]);
+      break;
+   case TGSI_OPCODE_SUB:
+      brw_ADD(p, dst, args[0], negate(args[1]));
+      break;
+   case TGSI_OPCODE_XPD:
+      emit_xpd(p, dst, args[0], args[1]);
+      break;
+#if 0
+   case TGSI_OPCODE_IF:
+      assert(if_insn < MAX_IFSN);
+      if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);
+      break;
+   case TGSI_OPCODE_ELSE:
+      if_inst[if_insn-1] = brw_ELSE(p, if_inst[if_insn-1]);
+      break;
+   case TGSI_OPCODE_ENDIF:
+      assert(if_insn > 0);
+      brw_ENDIF(p, if_inst[--if_insn]);
+      break;
+   case TGSI_OPCODE_BRA:
+      brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+      brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+      brw_set_predicate_control_flag_value(p, 0xff);
+      break;
+   case TGSI_OPCODE_CAL:
+      brw_set_access_mode(p, BRW_ALIGN_1);
+      brw_ADD(p, deref_1uw(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16));
+      brw_set_access_mode(p, BRW_ALIGN_16);
+      brw_ADD(p, get_addr_reg(stack_index),
+              get_addr_reg(stack_index), brw_imm_d(4));
+      inst->Data = &p->store[p->nr_insn];
+      brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+      break;
+#endif
+   case TGSI_OPCODE_RET:
+      brw_ADD(p, get_addr_reg(stack_index),
+              get_addr_reg(stack_index), brw_imm_d(-4));
+      brw_set_access_mode(p, BRW_ALIGN_1);
+      brw_MOV(p, brw_ip_reg(), deref_1uw(stack_index, 0));
+      brw_set_access_mode(p, BRW_ALIGN_16);
+   case TGSI_OPCODE_END:
+      brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+      break;
+   case TGSI_OPCODE_BGNSUB:
+   case TGSI_OPCODE_ENDSUB:
+      break;
+   default:
+      printf("Unsupport opcode %d in vertex shader\n", inst->Instruction.Opcode);
+      break;
+   }
+
+   if (dst_reg->File == TGSI_FILE_OUTPUT
+       && dst_reg->Index != info->pos_idx
+       && c->output_regs[dst_reg->Index].used_in_src)
+      brw_MOV(p, get_dst(c, dst_reg), dst);
+
+   release_tmps(c);
+}
+
 /* Emit the fragment program instructions here.
  */
 void brw_vs_emit(struct brw_vs_compile *c)
 {
 #define MAX_IFSN 32
    struct brw_compile *p = &c->func;
-   unsigned insn, if_insn = 0;
    struct brw_instruction *end_inst;
-   struct brw_instruction *if_inst[MAX_IFSN];
-   struct brw_indirect stack_index = brw_indirect(0, 0);
    struct tgsi_parse_context parse;
+   struct brw_indirect stack_index = brw_indirect(0, 0);
    const struct tgsi_token *tokens = c->vp->program.tokens;
    struct brw_prog_info prog_info;
    unsigned allocated_registers = 0;
    memset(&prog_info, 0, sizeof(struct brw_prog_info));
 
-   unsigned index;
-   unsigned file;
-
    brw_set_compression_control(p, BRW_COMPRESSION_NONE);
    brw_set_access_mode(p, BRW_ALIGN_16);
 
-#if 0
    tgsi_parse_init(&parse, tokens);
    /* Message registers can't be read, so copy the output into GRF register
       if they are used in source registers */
@@ -1014,11 +1262,13 @@ void brw_vs_emit(struct brw_vs_compile *c)
       switch (parse.FullToken.Token.Type) {
       case TGSI_TOKEN_TYPE_INSTRUCTION: {
          const struct tgsi_full_instruction *inst = &parse.FullToken.FullInstruction;
-         struct prog_src_register *src = &inst->SrcReg[i];
-         unsigned index = src->Index;
-         unsigned file = src->File;
-         if (file == TGSI_FILE_OUTPUT)
-            c->output_regs[index].used_in_src = TRUE;
+         for (i = 0; i < 3; ++i) {
+            const struct tgsi_src_register *src = &inst->FullSrcRegisters[i].SrcRegister;
+            unsigned index = src->Index;
+            unsigned file = src->File;
+            if (file == TGSI_FILE_OUTPUT)
+               c->output_regs[index].used_in_src = TRUE;
+         }
       }
          break;
       default:
@@ -1026,7 +1276,7 @@ void brw_vs_emit(struct brw_vs_compile *c)
          break;
       }
    }
-#endif
+   tgsi_parse_free(&parse);
 
    tgsi_parse_init(&parse, tokens);
 
@@ -1036,205 +1286,27 @@ void brw_vs_emit(struct brw_vs_compile *c)
       switch (parse.FullToken.Token.Type) {
       case TGSI_TOKEN_TYPE_DECLARATION: {
          struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
-         /* FIXME: fill in brw_prog_info based on declarations here */
+         process_declaration(decl, &prog_info);
       }
          break;
       case TGSI_TOKEN_TYPE_IMMEDIATE: {
-
       }
          break;
       case TGSI_TOKEN_TYPE_INSTRUCTION: {
+         struct tgsi_full_instruction *inst = &parse.FullToken.FullInstruction;
          if (!allocated_registers) {
-            /* first instruction after declerations.
-             * know that we know used vars allocate
-             * registers */
+            /* first instruction (declerations finished).
+             * now that we know what vars are being used allocate
+             * registers for them.*/
             brw_vs_alloc_regs(c, &prog_info);
             brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
             allocated_registers = 1;
          }
+         process_instruction(c, inst, &prog_info);
       }
          break;
       }
    }
-#if 0
-      struct prog_instruction *inst = &c->vp->program.Base.Instructions[insn];
-      struct brw_reg args[3], dst;
-      unsigned i;
-
-      /* Get argument regs.  SWZ is special and does this itself.
-       */
-      inst->Data = &p->store[p->nr_insn];
-      if (inst->Opcode != TGSI_OPCODE_SWZ)
-         for (i = 0; i < 3; i++) {
-            struct prog_src_register *src = &inst->SrcReg[i];
-            index = src->Index;
-            file = src->File;
-            if (file == TGSI_FILE_OUTPUT&&c->output_regs[index].used_in_src)
-               args[i] = c->output_regs[index].reg;
-            else
-               args[i] = get_arg(c, src);
-         }
-
-      /* Get dest regs.  Note that it is possible for a reg to be both
-       * dst and arg, given the static allocation of registers.  So
-       * care needs to be taken emitting multi-operation instructions.
-       */
-      index = inst->DstReg.Index;
-      file = inst->DstReg.File;
-      if (file == TGSI_FILE_OUTPUT && c->output_regs[index].used_in_src)
-         dst = c->output_regs[index].reg;
-      else
-         dst = get_dst(c, inst->DstReg);
-
-      switch (inst->Opcode) {
-      case TGSI_OPCODE_ABS:
-	 brw_MOV(p, dst, brw_abs(args[0]));
-	 break;
-      case TGSI_OPCODE_ADD:
-	 brw_ADD(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_DP3:
-	 brw_DP3(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_DP4:
-	 brw_DP4(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_DPH:
-	 brw_DPH(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_DST:
-	 unalias2(c, dst, args[0], args[1], emit_dst_noalias);
-	 break;
-      case TGSI_OPCODE_EXP:
-	 unalias1(c, dst, args[0], emit_exp_noalias);
-	 break;
-      case TGSI_OPCODE_EX2:
-	 emit_math1(c, BRW_MATH_FUNCTION_EXP, dst, args[0], BRW_MATH_PRECISION_FULL);
-	 break;
-      case TGSI_OPCODE_ARL:
-	 emit_arl(c, dst, args[0]);
-	 break;
-      case TGSI_OPCODE_FLR:
-	 brw_RNDD(p, dst, args[0]);
-	 break;
-      case TGSI_OPCODE_FRC:
-	 brw_FRC(p, dst, args[0]);
-	 break;
-      case TGSI_OPCODE_LOG:
-	 unalias1(c, dst, args[0], emit_log_noalias);
-	 break;
-      case TGSI_OPCODE_LG2:
-	 emit_math1(c, BRW_MATH_FUNCTION_LOG, dst, args[0], BRW_MATH_PRECISION_FULL);
-	 break;
-      case TGSI_OPCODE_LIT:
-	 unalias1(c, dst, args[0], emit_lit_noalias);
-	 break;
-      case TGSI_OPCODE_MAD:
-	 brw_MOV(p, brw_acc_reg(), args[2]);
-	 brw_MAC(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_MAX:
-	 emit_max(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_MIN:
-	 emit_min(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_MOV:
-	 brw_MOV(p, dst, args[0]);
-	 break;
-      case TGSI_OPCODE_MUL:
-	 brw_MUL(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_POW:
-	 emit_math2(c, BRW_MATH_FUNCTION_POW, dst, args[0], args[1], BRW_MATH_PRECISION_FULL);
-	 break;
-      case TGSI_OPCODE_RCP:
-	 emit_math1(c, BRW_MATH_FUNCTION_INV, dst, args[0], BRW_MATH_PRECISION_FULL);
-	 break;
-      case TGSI_OPCODE_RSQ:
-	 emit_math1(c, BRW_MATH_FUNCTION_RSQ, dst, args[0], BRW_MATH_PRECISION_FULL);
-	 break;
-
-      case TGSI_OPCODE_SEQ:
-         emit_seq(p, dst, args[0], args[1]);
-         break;
-      case TGSI_OPCODE_SNE:
-         emit_sne(p, dst, args[0], args[1]);
-         break;
-      case TGSI_OPCODE_SGE:
-	 emit_sge(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_SGT:
-         emit_sgt(p, dst, args[0], args[1]);
-         break;
-      case TGSI_OPCODE_SLT:
-	 emit_slt(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_SLE:
-         emit_sle(p, dst, args[0], args[1]);
-         break;
-      case TGSI_OPCODE_SUB:
-	 brw_ADD(p, dst, args[0], negate(args[1]));
-	 break;
-      case TGSI_OPCODE_SWZ:
-	 /* The args[0] value can't be used here as it won't have
-	  * correctly encoded the full swizzle:
-	  */
-	 emit_swz(c, dst, inst->SrcReg[0] );
-	 break;
-      case TGSI_OPCODE_XPD:
-	 emit_xpd(p, dst, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_IF:
-	 assert(if_insn < MAX_IFSN);
-         if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);
-	 break;
-      case TGSI_OPCODE_ELSE:
-	 if_inst[if_insn-1] = brw_ELSE(p, if_inst[if_insn-1]);
-	 break;
-      case TGSI_OPCODE_ENDIF:
-         assert(if_insn > 0);
-	 brw_ENDIF(p, if_inst[--if_insn]);
-	 break;
-      case TGSI_OPCODE_BRA:
-         brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
-         brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
-         brw_set_predicate_control_flag_value(p, 0xff);
-         break;
-      case TGSI_OPCODE_CAL:
-	 brw_set_access_mode(p, BRW_ALIGN_1);
-	 brw_ADD(p, deref_1uw(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16));
-	 brw_set_access_mode(p, BRW_ALIGN_16);
-	 brw_ADD(p, get_addr_reg(stack_index),
-                 get_addr_reg(stack_index), brw_imm_d(4));
-	 inst->Data = &p->store[p->nr_insn];
-	 brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
-         break;
-      case TGSI_OPCODE_RET:
-	 brw_ADD(p, get_addr_reg(stack_index),
-                 get_addr_reg(stack_index), brw_imm_d(-4));
-	 brw_set_access_mode(p, BRW_ALIGN_1);
-         brw_MOV(p, brw_ip_reg(), deref_1uw(stack_index, 0));
-	 brw_set_access_mode(p, BRW_ALIGN_16);
-      case TGSI_OPCODE_END:
-         brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
-         break;
-      case TGSI_OPCODE_BGNSUB:
-      case TGSI_OPCODE_ENDSUB:
-	 break;
-      default:
-	 printf("Unsupport opcode %d in vertex shader\n", inst->Opcode);
-	 break;
-      }
-
-      if (inst->DstReg.File == TGSI_FILE_OUTPUT
-          && inst->DstReg.Index != VERT_RESULT_HPOS
-          && c->output_regs[inst->DstReg.Index].used_in_src)
-         brw_MOV(p, get_dst(c, inst->DstReg), dst);
-
-      release_tmps(c);
-   }
-#endif
 
    end_inst = &p->store[p->nr_insn];
    emit_vertex_write(c, &prog_info);
diff --git a/src/mesa/pipe/i965simple/brw_wm_debug.c b/src/mesa/pipe/i965simple/brw_wm_debug.c
deleted file mode 100644
index b31a608901..0000000000
--- a/src/mesa/pipe/i965simple/brw_wm_debug.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
- 
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
- 
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
- 
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- 
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-               
-
-#include "brw_context.h"
-#include "brw_wm.h"
-
-#if 0
-void brw_wm_print_value( struct brw_wm_compile *c,
-		       struct brw_wm_value *value )
-{
-   assert(value);
-   if (c->state >= PASS2_DONE) 
-      brw_print_reg(value->hw_reg);
-   else if( value == &c->undef_value )
-      _mesa_printf("undef");
-   else if( value - c->vreg >= 0 &&
-	    value - c->vreg < BRW_WM_MAX_VREG)
-      _mesa_printf("r%d", value - c->vreg);
-   else if (value - c->creg >= 0 &&
-	    value - c->creg < BRW_WM_MAX_PARAM)
-      _mesa_printf("c%d", value - c->creg);
-   else if (value - c->payload.input_interp >= 0 &&
-	    value - c->payload.input_interp < FRAG_ATTRIB_MAX)
-      _mesa_printf("i%d", value - c->payload.input_interp);
-   else if (value - c->payload.depth >= 0 &&
-	    value - c->payload.depth < FRAG_ATTRIB_MAX)
-      _mesa_printf("d%d", value - c->payload.depth);
-   else 
-      _mesa_printf("?");
-}
-
-void brw_wm_print_ref( struct brw_wm_compile *c,
-		       struct brw_wm_ref *ref )
-{
-   struct brw_reg hw_reg = ref->hw_reg;
-
-   if (ref->unspill_reg)
-      _mesa_printf("UNSPILL(%x)/", ref->value->spill_slot);
-
-   if (c->state >= PASS2_DONE)
-      brw_print_reg(ref->hw_reg);
-   else {
-      _mesa_printf("%s", hw_reg.negate ? "-" : "");
-      _mesa_printf("%s", hw_reg.abs ? "abs/" : "");
-      brw_wm_print_value(c, ref->value);
-      if ((hw_reg.nr&1) || hw_reg.subnr) {
-	 _mesa_printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr);
-      }
-   }
-}
-
-void brw_wm_print_insn( struct brw_wm_compile *c,
-			struct brw_wm_instruction *inst )
-{
-   unsigned i, arg;
-   unsigned nr_args = brw_wm_nr_args(inst->opcode);
-
-   _mesa_printf("[");
-   for (i = 0; i < 4; i++) {
-      if (inst->dst[i]) {
-	 brw_wm_print_value(c, inst->dst[i]);
-	 if (inst->dst[i]->spill_slot)
-	    _mesa_printf("/SPILL(%x)",inst->dst[i]->spill_slot);
-      }
-      else
-	 _mesa_printf("#");
-      if (i < 3)      
-	 _mesa_printf(",");
-   }
-   _mesa_printf("]");
-
-   if (inst->writemask != WRITEMASK_XYZW)
-      _mesa_printf(".%s%s%s%s", 
-		   GET_BIT(inst->writemask, 0) ? "x" : "",
-		   GET_BIT(inst->writemask, 1) ? "y" : "",
-		   GET_BIT(inst->writemask, 2) ? "z" : "",
-		   GET_BIT(inst->writemask, 3) ? "w" : "");
-
-   switch (inst->opcode) {
-   case WM_PIXELXY:
-      _mesa_printf(" = PIXELXY");
-      break;
-   case WM_DELTAXY:
-      _mesa_printf(" = DELTAXY");
-      break;
-   case WM_PIXELW:
-      _mesa_printf(" = PIXELW");
-      break;
-   case WM_WPOSXY:
-      _mesa_printf(" = WPOSXY");
-      break;
-   case WM_PINTERP:
-      _mesa_printf(" = PINTERP");
-      break;
-   case WM_LINTERP:
-      _mesa_printf(" = LINTERP");
-      break;
-   case WM_CINTERP:
-      _mesa_printf(" = CINTERP");
-      break;
-   case WM_FB_WRITE:
-      _mesa_printf(" = FB_WRITE");
-      break;
-   default:
-      _mesa_printf(" = %s", _mesa_opcode_string(inst->opcode));
-      break;
-   }
-
-   if (inst->saturate)
-      _mesa_printf("_SAT");
-
-   for (arg = 0; arg < nr_args; arg++) {
-
-      _mesa_printf(" [");
-
-      for (i = 0; i < 4; i++) {
-	 if (inst->src[arg][i]) {
-	    brw_wm_print_ref(c, inst->src[arg][i]);
-	 }
-	 else
-	    _mesa_printf("%%");
-
-	 if (i < 3) 
-	    _mesa_printf(",");
-	 else
-	    _mesa_printf("]");
-      }
-   }
-   _mesa_printf("\n");
-}
-
-void brw_wm_print_program( struct brw_wm_compile *c,
-			   const char *stage )
-{
-   unsigned insn;
-
-   _mesa_printf("\n\n\n%s:\n", stage);
-   for (insn = 0; insn < c->nr_insns; insn++)
-      brw_wm_print_insn(c, &c->instruction[insn]);
-   _mesa_printf("\n\n\n");
-}
-
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_wm_emit.c b/src/mesa/pipe/i965simple/brw_wm_emit.c
deleted file mode 100644
index 75bc4cd419..0000000000
--- a/src/mesa/pipe/i965simple/brw_wm_emit.c
+++ /dev/null
@@ -1,1289 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-
-#include "brw_context.h"
-#include "brw_wm.h"
-
-#define SATURATE (1<<5)
-
-/* Not quite sure how correct this is - need to understand horiz
- * vs. vertical strides a little better.
- */
-static __inline struct brw_reg sechalf( struct brw_reg reg )
-{
-   if (reg.vstride)
-      reg.nr++;
-   return reg;
-}
-
-/* Payload R0:
- *
- * R0.0 -- pixel mask, one bit for each of 4 pixels in 4 tiles,
- *         corresponding to each of the 16 execution channels.
- * R0.1..8 -- ?
- * R1.0 -- triangle vertex 0.X
- * R1.1 -- triangle vertex 0.Y
- * R1.2 -- tile 0 x,y coords (2 packed uwords)
- * R1.3 -- tile 1 x,y coords (2 packed uwords)
- * R1.4 -- tile 2 x,y coords (2 packed uwords)
- * R1.5 -- tile 3 x,y coords (2 packed uwords)
- * R1.6 -- ?
- * R1.7 -- ?
- * R1.8 -- ?
- */
-
-
-static void emit_pixel_xy(struct brw_compile *p,
-			  const struct brw_reg *dst,
-			  unsigned mask,
-			  const struct brw_reg *arg0)
-{
-   struct brw_reg r1 = brw_vec1_grf(1, 0);
-   struct brw_reg r1_uw = retype(r1, BRW_REGISTER_TYPE_UW);
-
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-
-   /* Calculate pixel centers by adding 1 or 0 to each of the
-    * micro-tile coordinates passed in r1.
-    */
-   if (mask & TGSI_WRITEMASK_X) {
-      brw_ADD(p,
-	      vec16(retype(dst[0], BRW_REGISTER_TYPE_UW)),
-	      stride(suboffset(r1_uw, 4), 2, 4, 0),
-	      brw_imm_v(0x10101010));
-   }
-
-   if (mask & TGSI_WRITEMASK_Y) {
-      brw_ADD(p,
-	      vec16(retype(dst[1], BRW_REGISTER_TYPE_UW)),
-	      stride(suboffset(r1_uw,5), 2, 4, 0),
-	      brw_imm_v(0x11001100));
-   }
-
-   brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
-}
-
-
-
-static void emit_delta_xy(struct brw_compile *p,
-			  const struct brw_reg *dst,
-			  unsigned mask,
-			  const struct brw_reg *arg0,
-			  const struct brw_reg *arg1)
-{
-   struct brw_reg r1 = brw_vec1_grf(1, 0);
-
-   /* Calc delta X,Y by subtracting origin in r1 from the pixel
-    * centers.
-    */
-   if (mask & TGSI_WRITEMASK_X) {
-      brw_ADD(p,
-	      dst[0],
-	      retype(arg0[0], BRW_REGISTER_TYPE_UW),
-	      negate(r1));
-   }
-
-   if (mask & TGSI_WRITEMASK_Y) {
-      brw_ADD(p,
-	      dst[1],
-	      retype(arg0[1], BRW_REGISTER_TYPE_UW),
-	      negate(suboffset(r1,1)));
-
-   }
-}
-
-static void emit_wpos_xy(struct brw_compile *p,
-			   const struct brw_reg *dst,
-			   unsigned mask,
-			   const struct brw_reg *arg0)
-{
-   /* Calc delta X,Y by subtracting origin in r1 from the pixel
-    * centers.
-    */
-   if (mask & TGSI_WRITEMASK_X) {
-      brw_MOV(p,
-	      dst[0],
-	      retype(arg0[0], BRW_REGISTER_TYPE_UW));
-   }
-
-   if (mask & TGSI_WRITEMASK_Y) {
-      /* TODO -- window_height - Y */
-      brw_MOV(p,
-	      dst[1],
-	      negate(retype(arg0[1], BRW_REGISTER_TYPE_UW)));
-
-   }
-}
-
-
-static void emit_pixel_w( struct brw_compile *p,
-			  const struct brw_reg *dst,
-			  unsigned mask,
-			  const struct brw_reg *arg0,
-			  const struct brw_reg *deltas)
-{
-   /* Don't need this if all you are doing is interpolating color, for
-    * instance.
-    */
-   if (mask & TGSI_WRITEMASK_W) {
-      struct brw_reg interp3 = brw_vec1_grf(arg0[0].nr+1, 4);
-
-      /* Calc 1/w - just linterp wpos[3] optimized by putting the
-       * result straight into a message reg.
-       */
-      brw_LINE(p, brw_null_reg(), interp3, deltas[0]);
-      brw_MAC(p, brw_message_reg(2), suboffset(interp3, 1), deltas[1]);
-
-      /* Calc w */
-      brw_math_16( p, dst[3],
-		   BRW_MATH_FUNCTION_INV,
-		   BRW_MATH_SATURATE_NONE,
-		   2, brw_null_reg(),
-		   BRW_MATH_PRECISION_FULL);
-   }
-}
-
-
-
-static void emit_linterp( struct brw_compile *p,
-			 const struct brw_reg *dst,
-			 unsigned mask,
-			 const struct brw_reg *arg0,
-			 const struct brw_reg *deltas )
-{
-   struct brw_reg interp[4];
-   unsigned nr = arg0[0].nr;
-   unsigned i;
-
-   interp[0] = brw_vec1_grf(nr, 0);
-   interp[1] = brw_vec1_grf(nr, 4);
-   interp[2] = brw_vec1_grf(nr+1, 0);
-   interp[3] = brw_vec1_grf(nr+1, 4);
-
-   for(i = 0; i < 4; i++ ) {
-      if (mask & (1<<i)) {
-	 brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
-	 brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
-      }
-   }
-}
-
-
-static void emit_pinterp( struct brw_compile *p,
-			  const struct brw_reg *dst,
-			  unsigned mask,
-			  const struct brw_reg *arg0,
-			  const struct brw_reg *deltas,
-			  const struct brw_reg *w)
-{
-   struct brw_reg interp[4];
-   unsigned nr = arg0[0].nr;
-   unsigned i;
-
-   interp[0] = brw_vec1_grf(nr, 0);
-   interp[1] = brw_vec1_grf(nr, 4);
-   interp[2] = brw_vec1_grf(nr+1, 0);
-   interp[3] = brw_vec1_grf(nr+1, 4);
-
-   for(i = 0; i < 4; i++ ) {
-      if (mask & (1<<i)) {
-	 brw_LINE(p, brw_null_reg(), interp[i], deltas[0]);
-	 brw_MAC(p, dst[i], suboffset(interp[i],1), deltas[1]);
-	 brw_MUL(p, dst[i], dst[i], w[3]);
-      }
-   }
-}
-
-static void emit_cinterp( struct brw_compile *p,
-			 const struct brw_reg *dst,
-			 unsigned mask,
-			 const struct brw_reg *arg0 )
-{
-	struct brw_reg interp[4];
-	unsigned nr = arg0[0].nr;
-	unsigned i;
-
-	interp[0] = brw_vec1_grf(nr, 0);
-	interp[1] = brw_vec1_grf(nr, 4);
-	interp[2] = brw_vec1_grf(nr+1, 0);
-	interp[3] = brw_vec1_grf(nr+1, 4);
-
-	for(i = 0; i < 4; i++ ) {
-		if (mask & (1<<i)) {
-			brw_MOV(p, dst[i], suboffset(interp[i],3));	/* TODO: optimize away like other moves */
-		}
-	}
-}
-
-
-
-
-
-static void emit_alu1( struct brw_compile *p,
-		       struct brw_instruction *(*func)(struct brw_compile *,
-						       struct brw_reg,
-						       struct brw_reg),
-		       const struct brw_reg *dst,
-		       unsigned mask,
-		       const struct brw_reg *arg0 )
-{
-   unsigned i;
-
-   if (mask & SATURATE)
-      brw_set_saturate(p, 1);
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 func(p, dst[i], arg0[i]);
-      }
-   }
-
-   if (mask & SATURATE)
-      brw_set_saturate(p, 0);
-}
-
-static void emit_alu2( struct brw_compile *p,
-		       struct brw_instruction *(*func)(struct brw_compile *,
-						       struct brw_reg,
-						       struct brw_reg,
-						       struct brw_reg),
-		       const struct brw_reg *dst,
-		       unsigned mask,
-		       const struct brw_reg *arg0,
-		       const struct brw_reg *arg1 )
-{
-   unsigned i;
-
-   if (mask & SATURATE)
-      brw_set_saturate(p, 1);
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 func(p, dst[i], arg0[i], arg1[i]);
-      }
-   }
-
-   if (mask & SATURATE)
-      brw_set_saturate(p, 0);
-}
-
-
-static void emit_mad( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1,
-		      const struct brw_reg *arg2 )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 brw_MUL(p, dst[i], arg0[i], arg1[i]);
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_ADD(p, dst[i], dst[i], arg2[i]);
-	 brw_set_saturate(p, 0);
-      }
-   }
-}
-
-
-static void emit_lrp( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1,
-		      const struct brw_reg *arg2 )
-{
-   unsigned i;
-
-   /* Uses dst as a temporary:
-    */
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 /* Can I use the LINE instruction for this?
-	  */
-	 brw_ADD(p, dst[i], negate(arg0[i]), brw_imm_f(1.0));
-	 brw_MUL(p, brw_null_reg(), dst[i], arg2[i]);
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MAC(p, dst[i], arg0[i], arg1[i]);
-	 brw_set_saturate(p, 0);
-      }
-   }
-}
-static void emit_sop( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      unsigned cond,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 brw_MOV(p, dst[i], brw_imm_f(0));
-	 brw_CMP(p, brw_null_reg(), cond, arg0[i], arg1[i]);
-	 brw_MOV(p, dst[i], brw_imm_f(1.0));
-	 brw_set_predicate_control_flag_value(p, 0xff);
-      }
-   }
-}
-
-static void emit_slt( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_L, arg0, arg1);
-}
-
-static void emit_sle( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_LE, arg0, arg1);
-}
-
-static void emit_sgt( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_G, arg0, arg1);
-}
-
-static void emit_sge( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_GE, arg0, arg1);
-}
-
-static void emit_seq( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_EQ, arg0, arg1);
-}
-
-static void emit_sne( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-	 emit_sop(p, dst, mask, BRW_CONDITIONAL_NEQ, arg0, arg1);
-}
-
-static void emit_cmp( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1,
-		      const struct brw_reg *arg2 )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg2[i]);
-	 brw_set_saturate(p, 0);
-
-	 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], brw_imm_f(0));
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg1[i]);
-	 brw_set_saturate(p, 0);
-	 brw_set_predicate_control_flag_value(p, 0xff);
-      }
-   }
-}
-
-static void emit_max( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg0[i]);
-	 brw_set_saturate(p, 0);
-
-	 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], arg1[i]);
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg1[i]);
-	 brw_set_saturate(p, 0);
-	 brw_set_predicate_control_flag_value(p, 0xff);
-      }
-   }
-}
-
-static void emit_min( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (mask & (1<<i)) {
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg1[i]);
-	 brw_set_saturate(p, 0);
-
-	 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], arg1[i]);
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MOV(p, dst[i], arg0[i]);
-	 brw_set_saturate(p, 0);
-	 brw_set_predicate_control_flag_value(p, 0xff);
-      }
-   }
-}
-
-
-static void emit_dp3( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   assert((mask & TGSI_WRITEMASK_XYZW) == TGSI_WRITEMASK_X);
-
-   brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
-   brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
-
-   brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-   brw_MAC(p, dst[0], arg0[2], arg1[2]);
-   brw_set_saturate(p, 0);
-}
-
-
-static void emit_dp4( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   assert((mask & TGSI_WRITEMASK_XYZW) == TGSI_WRITEMASK_X);
-
-   brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
-   brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
-   brw_MAC(p, brw_null_reg(), arg0[2], arg1[2]);
-
-   brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-   brw_MAC(p, dst[0], arg0[3], arg1[3]);
-   brw_set_saturate(p, 0);
-}
-
-
-static void emit_dph( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   assert((mask & TGSI_WRITEMASK_XYZW) == TGSI_WRITEMASK_X);
-
-   brw_MUL(p, brw_null_reg(), arg0[0], arg1[0]);
-   brw_MAC(p, brw_null_reg(), arg0[1], arg1[1]);
-   brw_MAC(p, dst[0], arg0[2], arg1[2]);
-
-   brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-   brw_ADD(p, dst[0], dst[0], arg1[3]);
-   brw_set_saturate(p, 0);
-}
-
-
-static void emit_xpd( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0,
-		      const struct brw_reg *arg1 )
-{
-   unsigned i;
-
-   assert(!(mask & TGSI_WRITEMASK_W) == TGSI_WRITEMASK_X);
-
-   for (i = 0 ; i < 3; i++) {
-      if (mask & (1<<i)) {
-	 unsigned i2 = (i+2)%3;
-	 unsigned i1 = (i+1)%3;
-
-	 brw_MUL(p, brw_null_reg(), negate(arg0[i2]), arg1[i1]);
-
-	 brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-	 brw_MAC(p, dst[i], arg0[i1], arg1[i2]);
-	 brw_set_saturate(p, 0);
-      }
-   }
-}
-
-
-static void emit_math1( struct brw_compile *p,
-			unsigned function,
-			const struct brw_reg *dst,
-			unsigned mask,
-			const struct brw_reg *arg0 )
-{
-   //assert((mask & WRITEMASK_XYZW) == WRITEMASK_X ||
-   //	  function == BRW_MATH_FUNCTION_SINCOS);
-
-   brw_MOV(p, brw_message_reg(2), arg0[0]);
-
-   /* Send two messages to perform all 16 operations:
-    */
-   brw_math_16(p,
-	       dst[0],
-	       function,
-	       (mask & SATURATE) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
-	       2,
-	       brw_null_reg(),
-	       BRW_MATH_PRECISION_FULL);
-}
-
-
-static void emit_math2( struct brw_compile *p,
-			unsigned function,
-			const struct brw_reg *dst,
-			unsigned mask,
-			const struct brw_reg *arg0,
-			const struct brw_reg *arg1)
-{
-   assert((mask & TGSI_WRITEMASK_XYZW) == TGSI_WRITEMASK_X);
-
-   brw_push_insn_state(p);
-
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-   brw_MOV(p, brw_message_reg(2), arg0[0]);
-   brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF);
-   brw_MOV(p, brw_message_reg(4), sechalf(arg0[0]));
-
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-   brw_MOV(p, brw_message_reg(3), arg1[0]);
-   brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF);
-   brw_MOV(p, brw_message_reg(5), sechalf(arg1[0]));
-
-
-   /* Send two messages to perform all 16 operations:
-    */
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-   brw_math(p,
-	    dst[0],
-	    function,
-	    (mask & SATURATE) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
-	    2,
-	    brw_null_reg(),
-	    BRW_MATH_DATA_VECTOR,
-	    BRW_MATH_PRECISION_FULL);
-
-   brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF);
-   brw_math(p,
-	    offset(dst[0],1),
-	    function,
-	    (mask & SATURATE) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
-	    4,
-	    brw_null_reg(),
-	    BRW_MATH_DATA_VECTOR,
-	    BRW_MATH_PRECISION_FULL);
-
-   brw_pop_insn_state(p);
-}
-
-
-
-static void emit_tex( struct brw_wm_compile *c,
-		      const struct brw_wm_instruction *inst,
-		      struct brw_reg *dst,
-		      unsigned dst_flags,
-		      struct brw_reg *arg )
-{
-   struct brw_compile *p = &c->func;
-   unsigned msgLength, responseLength;
-   boolean shadow = (c->key.shadowtex_mask & (1<<inst->tex_unit)) ? 1 : 0;
-   unsigned i, nr;
-   unsigned emit;
-
-   /* How many input regs are there?
-    */
-   switch (inst->tex_idx) {
-   case TGSI_TEXTURE_1D:
-      emit = TGSI_WRITEMASK_X;
-      nr = 1;
-      break;
-   case TGSI_TEXTURE_2D:
-   case TGSI_TEXTURE_RECT:
-      emit = TGSI_WRITEMASK_XY;
-      nr = 2;
-      break;
-   default:
-      emit = TGSI_WRITEMASK_XYZ;
-      nr = 3;
-      break;
-   }
-
-   if (shadow) {
-      nr = 4;
-      emit |= TGSI_WRITEMASK_W;
-   }
-
-   msgLength = 1;
-
-   for (i = 0; i < nr; i++) {
-      static const unsigned swz[4] = {0,1,2,2};
-      if (emit & (1<<i))
-	 brw_MOV(p, brw_message_reg(msgLength+1), arg[swz[i]]);
-      else
-	 brw_MOV(p, brw_message_reg(msgLength+1), brw_imm_f(0));
-      msgLength += 2;
-   }
-
-   responseLength = 8;		/* always */
-
-   brw_SAMPLE(p,
-	      retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
-	      1,
-	      retype(c->payload.depth[0].hw_reg, BRW_REGISTER_TYPE_UW),
-	      inst->tex_unit + 1, /* surface */
-	      inst->tex_unit,	  /* sampler */
-	      inst->writemask,
-	      (shadow ?
-	       BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE :
-	       BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE),
-	      responseLength,
-	      msgLength,
-	      0);
-
-   if (shadow)
-       brw_MOV(p, dst[3], brw_imm_f(1.0));
-}
-
-
-static void emit_txb( struct brw_wm_compile *c,
-		      const struct brw_wm_instruction *inst,
-		      struct brw_reg *dst,
-		      unsigned dst_flags,
-		      struct brw_reg *arg )
-{
-   struct brw_compile *p = &c->func;
-   unsigned msgLength;
-
-   /* Shadow ignored for txb.
-    */
-   switch (inst->tex_idx) {
-   case TGSI_TEXTURE_1D:
-      brw_MOV(p, brw_message_reg(2), arg[0]);
-      brw_MOV(p, brw_message_reg(4), brw_imm_f(0));
-      brw_MOV(p, brw_message_reg(6), brw_imm_f(0));
-      break;
-   case TGSI_TEXTURE_2D:
-   case TGSI_TEXTURE_RECT:
-      brw_MOV(p, brw_message_reg(2), arg[0]);
-      brw_MOV(p, brw_message_reg(4), arg[1]);
-      brw_MOV(p, brw_message_reg(6), brw_imm_f(0));
-      break;
-   default:
-      brw_MOV(p, brw_message_reg(2), arg[0]);
-      brw_MOV(p, brw_message_reg(4), arg[1]);
-      brw_MOV(p, brw_message_reg(6), arg[2]);
-      break;
-   }
-
-   brw_MOV(p, brw_message_reg(8), arg[3]);
-   msgLength = 9;
-
-
-   brw_SAMPLE(p,
-	      retype(vec16(dst[0]), BRW_REGISTER_TYPE_UW),
-	      1,
-	      retype(c->payload.depth[0].hw_reg, BRW_REGISTER_TYPE_UW),
-	      inst->tex_unit + 1, /* surface */
-	      inst->tex_unit,	  /* sampler */
-	      inst->writemask,
-	      BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS,
-	      8,		/* responseLength */
-	      msgLength,
-	      0);
-
-}
-
-
-static void emit_lit( struct brw_compile *p,
-		      const struct brw_reg *dst,
-		      unsigned mask,
-		      const struct brw_reg *arg0 )
-{
-   assert((mask & TGSI_WRITEMASK_XW) == 0);
-
-   if (mask & TGSI_WRITEMASK_Y) {
-      brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
-      brw_MOV(p, dst[1], arg0[0]);
-      brw_set_saturate(p, 0);
-   }
-
-   if (mask & TGSI_WRITEMASK_Z) {
-      emit_math2(p, BRW_MATH_FUNCTION_POW,
-		 &dst[2],
-		 TGSI_WRITEMASK_X | (mask & SATURATE),
-		 &arg0[1],
-		 &arg0[3]);
-   }
-
-   /* Ordinarily you'd use an iff statement to skip or shortcircuit
-    * some of the POW calculations above, but 16-wide iff statements
-    * seem to lock c1 hardware, so this is a nasty workaround:
-    */
-   brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_LE, arg0[0], brw_imm_f(0));
-   {
-      if (mask & TGSI_WRITEMASK_Y)
-	 brw_MOV(p, dst[1], brw_imm_f(0));
-
-      if (mask & TGSI_WRITEMASK_Z)
-	 brw_MOV(p, dst[2], brw_imm_f(0));
-   }
-   brw_set_predicate_control(p, BRW_PREDICATE_NONE);
-}
-
-
-/* Kill pixel - set execution mask to zero for those pixels which
- * fail.
- */
-static void emit_kil( struct brw_wm_compile *c,
-		      struct brw_reg *arg0)
-{
-   struct brw_compile *p = &c->func;
-   struct brw_reg r0uw = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
-   unsigned i;
-
-
-   /* XXX - usually won't need 4 compares!
-    */
-   for (i = 0; i < 4; i++) {
-      brw_push_insn_state(p);
-      brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_GE, arg0[i], brw_imm_f(0));
-      brw_set_predicate_control_flag_value(p, 0xff);
-      brw_AND(p, r0uw, brw_flag_reg(), r0uw);
-      brw_pop_insn_state(p);
-   }
-}
-
-static void fire_fb_write( struct brw_wm_compile *c,
-			   unsigned base_reg,
-			   unsigned nr )
-{
-   struct brw_compile *p = &c->func;
-
-   /* Pass through control information:
-    */
-/*  mov (8) m1.0<1>:ud   r1.0<8;8,1>:ud   { Align1 NoMask } */
-   {
-      brw_push_insn_state(p);
-      brw_set_mask_control(p, BRW_MASK_DISABLE); /* ? */
-      brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-      brw_MOV(p,
-	       brw_message_reg(base_reg + 1),
-	       brw_vec8_grf(1, 0));
-      brw_pop_insn_state(p);
-   }
-
-   /* Send framebuffer write message: */
-/*  send (16) null.0<1>:uw m0               r0.0<8;8,1>:uw   0x85a04000:ud    { Align1 EOT } */
-   brw_fb_WRITE(p,
-		retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW),
-		base_reg,
-		retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
-		0,		/* render surface always 0 */
-		nr,
-		0,
-		1);
-}
-
-static void emit_aa( struct brw_wm_compile *c,
-		     struct brw_reg *arg1,
-		     unsigned reg )
-{
-   struct brw_compile *p = &c->func;
-   unsigned comp = c->key.aa_dest_stencil_reg / 2;
-   unsigned off = c->key.aa_dest_stencil_reg % 2;
-   struct brw_reg aa = offset(arg1[comp], off);
-
-   brw_push_insn_state(p);
-   brw_set_compression_control(p, BRW_COMPRESSION_NONE); /* ?? */
-   brw_MOV(p, brw_message_reg(reg), aa);
-   brw_pop_insn_state(p);
-}
-
-
-/* Post-fragment-program processing.  Send the results to the
- * framebuffer.
- */
-static void emit_fb_write( struct brw_wm_compile *c,
-			   struct brw_reg *arg0,
-			   struct brw_reg *arg1,
-			   struct brw_reg *arg2)
-{
-   struct brw_compile *p = &c->func;
-   unsigned nr = 2;
-   unsigned channel;
-
-   /* Reserve a space for AA - may not be needed:
-    */
-   if (c->key.aa_dest_stencil_reg)
-      nr += 1;
-
-   /* I don't really understand how this achieves the color interleave
-    * (ie RGBARGBA) in the result:  [Do the saturation here]
-    */
-   {
-      brw_push_insn_state(p);
-
-      for (channel = 0; channel < 4; channel++) {
-	 /*  mov (8) m2.0<1>:ud   r28.0<8;8,1>:ud  { Align1 } */
-	 /*  mov (8) m6.0<1>:ud   r29.0<8;8,1>:ud  { Align1 SecHalf } */
-
-	 brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-	 brw_MOV(p,
-		 brw_message_reg(nr + channel),
-		 arg0[channel]);
-
-	 brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF);
-	 brw_MOV(p,
-		 brw_message_reg(nr + channel + 4),
-		 sechalf(arg0[channel]));
-      }
-
-      /* skip over the regs populated above:
-       */
-      nr += 8;
-
-      brw_pop_insn_state(p);
-   }
-
-   if (c->key.source_depth_to_render_target)
-   {
-      if (c->key.computes_depth)
-	 brw_MOV(p, brw_message_reg(nr), arg2[2]);
-      else
-	 brw_MOV(p, brw_message_reg(nr), arg1[1]); /* ? */
-
-      nr += 2;
-   }
-
-   if (c->key.dest_depth_reg)
-   {
-      unsigned comp = c->key.dest_depth_reg / 2;
-      unsigned off = c->key.dest_depth_reg % 2;
-
-      if (off != 0) {
-	 brw_push_insn_state(p);
-	 brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-	 brw_MOV(p, brw_message_reg(nr), arg1[comp]);
-	 /* 2nd half? */
-	 brw_MOV(p, brw_message_reg(nr+1), offset(arg1[comp],1));
-	 brw_pop_insn_state(p);
-      }
-      else {
-	 brw_MOV(p, brw_message_reg(nr), arg1[comp]);
-      }
-      nr += 2;
-   }
-
-
-   if (!c->key.runtime_check_aads_emit) {
-      if (c->key.aa_dest_stencil_reg)
-	 emit_aa(c, arg1, 2);
-
-      fire_fb_write(c, 0, nr);
-   }
-   else {
-      struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
-      struct brw_reg ip = brw_ip_reg();
-      struct brw_instruction *jmp;
-
-      brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-      brw_set_conditionalmod(p, BRW_CONDITIONAL_Z);
-      brw_AND(p,
-	      v1_null_ud,
-	      get_element_ud(brw_vec8_grf(1,0), 6),
-	      brw_imm_ud(1<<26));
-
-      jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
-      {
-	 emit_aa(c, arg1, 2);
-	 fire_fb_write(c, 0, nr);
-	 /* note - thread killed in subroutine */
-      }
-      brw_land_fwd_jump(p, jmp);
-
-      /* ELSE: Shuffle up one register to fill in the hole left for AA:
-       */
-      fire_fb_write(c, 1, nr-1);
-   }
-}
-
-
-
-
-/* Post-fragment-program processing.  Send the results to the
- * framebuffer.
- */
-static void emit_spill( struct brw_wm_compile *c,
-			struct brw_reg reg,
-			unsigned slot )
-{
-   struct brw_compile *p = &c->func;
-
-   /*
-     mov (16) m2.0<1>:ud   r2.0<8;8,1>:ud   { Align1 Compr }
-   */
-   brw_MOV(p, brw_message_reg(2), reg);
-
-   /*
-     mov (1) r0.2<1>:d    0x00000080:d     { Align1 NoMask }
-     send (16) null.0<1>:uw m1               r0.0<8;8,1>:uw   0x053003ff:ud    { Align1 }
-   */
-   brw_dp_WRITE_16(p,
-		   retype(vec16(brw_vec8_grf(0, 0)), BRW_REGISTER_TYPE_UW),
-		   1,
-		   slot);
-}
-
-static void emit_unspill( struct brw_wm_compile *c,
-			  struct brw_reg reg,
-			  unsigned slot )
-{
-   struct brw_compile *p = &c->func;
-
-   /* Slot 0 is the undef value.
-    */
-   if (slot == 0) {
-      brw_MOV(p, reg, brw_imm_f(0));
-      return;
-   }
-
-   /*
-     mov (1) r0.2<1>:d    0x000000c0:d     { Align1 NoMask }
-     send (16) r110.0<1>:uw m1               r0.0<8;8,1>:uw   0x041243ff:ud    { Align1 }
-   */
-
-   brw_dp_READ_16(p,
-		  retype(vec16(reg), BRW_REGISTER_TYPE_UW),
-		  1,
-		  slot);
-}
-
-
-
-/**
- * Retrieve upto 4 GEN4 register pairs for the given wm reg:
- */
-static void get_argument_regs( struct brw_wm_compile *c,
-			       struct brw_wm_ref *arg[],
-			       struct brw_reg *regs )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (arg[i]) {
-
-	 if (arg[i]->unspill_reg)
-	    emit_unspill(c,
-			 brw_vec8_grf(arg[i]->unspill_reg, 0),
-			 arg[i]->value->spill_slot);
-
-	 regs[i] = arg[i]->hw_reg;
-      }
-      else {
-	 regs[i] = brw_null_reg();
-      }
-   }
-}
-
-static void spill_values( struct brw_wm_compile *c,
-			  struct brw_wm_value *values,
-			  unsigned nr )
-{
-   unsigned i;
-
-   for (i = 0; i < nr; i++)
-      if (values[i].spill_slot)
-	 emit_spill(c, values[i].hw_reg, values[i].spill_slot);
-}
-
-
-
-/* Emit the fragment program instructions here.
- */
-void brw_wm_emit( struct brw_wm_compile *c )
-{
-   struct brw_compile *p = &c->func;
-   unsigned insn;
-
-   brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
-
-   /* Check if any of the payload regs need to be spilled:
-    */
-   spill_values(c, c->payload.depth, 4);
-   spill_values(c, c->creg, c->nr_creg);
-   spill_values(c, c->payload.input_interp, PIPE_ATTRIB_MAX);
-
-
-   for (insn = 0; insn < c->nr_insns; insn++) {
-
-      struct brw_wm_instruction *inst = &c->instruction[insn];
-      struct brw_reg args[3][4], dst[4];
-      unsigned i, dst_flags;
-
-      /* Get argument regs:
-       */
-      for (i = 0; i < 3; i++)
-	 get_argument_regs(c, inst->src[i], args[i]);
-
-      /* Get dest regs:
-       */
-      for (i = 0; i < 4; i++)
-	 if (inst->dst[i])
-	    dst[i] = inst->dst[i]->hw_reg;
-	 else
-	    dst[i] = brw_null_reg();
-
-      /* Flags
-       */
-      dst_flags = inst->writemask;
-      if (inst->saturate)
-	 dst_flags |= SATURATE;
-
-      switch (inst->opcode) {
-	 /* Generated instructions for calculating triangle interpolants:
-	  */
-      case WM_PIXELXY:
-	 emit_pixel_xy(p, dst, dst_flags, args[0]);
-	 break;
-
-      case WM_DELTAXY:
-	 emit_delta_xy(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case WM_WPOSXY:
-	 emit_wpos_xy(p, dst, dst_flags, args[0]);
-	 break;
-
-      case WM_PIXELW:
-	 emit_pixel_w(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case WM_LINTERP:
-	 emit_linterp(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case WM_PINTERP:
-	 emit_pinterp(p, dst, dst_flags, args[0], args[1], args[2]);
-	 break;
-
-      case WM_CINTERP:
-	 emit_cinterp(p, dst, dst_flags, args[0]);
-	 break;
-
-      case WM_FB_WRITE:
-	 emit_fb_write(c, args[0], args[1], args[2]);
-	 break;
-
-	 /* Straightforward arithmetic:
-	  */
-      case TGSI_OPCODE_ADD:
-	 emit_alu2(p, brw_ADD, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_FRC:
-	 emit_alu1(p, brw_FRC, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_FLR:
-	 emit_alu1(p, brw_RNDD, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_DP3:	/*  */
-	 emit_dp3(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_DP4:
-	 emit_dp4(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_DPH:
-	 emit_dph(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_LRP:	/*  */
-	 emit_lrp(p, dst, dst_flags, args[0], args[1], args[2]);
-	 break;
-
-      case TGSI_OPCODE_MAD:
-	 emit_mad(p, dst, dst_flags, args[0], args[1], args[2]);
-	 break;
-
-      case TGSI_OPCODE_MOV:
-	 emit_alu1(p, brw_MOV, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_MUL:
-	 emit_alu2(p, brw_MUL, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_XPD:
-	 emit_xpd(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-	 /* Higher math functions:
-	  */
-      case TGSI_OPCODE_RCP:
-	 emit_math1(p, BRW_MATH_FUNCTION_INV, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_RSQ:
-	 emit_math1(p, BRW_MATH_FUNCTION_RSQ, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_SIN:
-	 emit_math1(p, BRW_MATH_FUNCTION_SIN, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_COS:
-	 emit_math1(p, BRW_MATH_FUNCTION_COS, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_EX2:
-	 emit_math1(p, BRW_MATH_FUNCTION_EXP, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_LG2:
-	 emit_math1(p, BRW_MATH_FUNCTION_LOG, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_SCS:
-	 /* There is an scs math function, but it would need some
-	  * fixup for 16-element execution.
-	  */
-	 if (dst_flags & TGSI_WRITEMASK_X)
-	    emit_math1(p, BRW_MATH_FUNCTION_COS, dst, (dst_flags&SATURATE)|TGSI_WRITEMASK_X,
-                       args[0]);
-	 if (dst_flags & TGSI_WRITEMASK_Y)
-	    emit_math1(p, BRW_MATH_FUNCTION_SIN, dst+1, (dst_flags&SATURATE)|TGSI_WRITEMASK_X,
-                       args[0]);
-	 break;
-
-      case TGSI_OPCODE_POW:
-	 emit_math2(p, BRW_MATH_FUNCTION_POW, dst, dst_flags, args[0], args[1]);
-	 break;
-
-	 /* Comparisons:
-	  */
-      case TGSI_OPCODE_CMP:
-	 emit_cmp(p, dst, dst_flags, args[0], args[1], args[2]);
-	 break;
-
-      case TGSI_OPCODE_MAX:
-	 emit_max(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_MIN:
-	 emit_min(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_SLT:
-	 emit_slt(p, dst, dst_flags, args[0], args[1]);
-	 break;
-
-      case TGSI_OPCODE_SLE:
-	 emit_sle(p, dst, dst_flags, args[0], args[1]);
-	break;
-      case TGSI_OPCODE_SGT:
-	 emit_sgt(p, dst, dst_flags, args[0], args[1]);
-	break;
-      case TGSI_OPCODE_SGE:
-	 emit_sge(p, dst, dst_flags, args[0], args[1]);
-	 break;
-      case TGSI_OPCODE_SEQ:
-	 emit_seq(p, dst, dst_flags, args[0], args[1]);
-	break;
-      case TGSI_OPCODE_SNE:
-	 emit_sne(p, dst, dst_flags, args[0], args[1]);
-	break;
-
-      case TGSI_OPCODE_LIT:
-	 emit_lit(p, dst, dst_flags, args[0]);
-	 break;
-
-	 /* Texturing operations:
-	  */
-      case TGSI_OPCODE_TEX:
-	 emit_tex(c, inst, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_TXB:
-	 emit_txb(c, inst, dst, dst_flags, args[0]);
-	 break;
-
-      case TGSI_OPCODE_KIL:
-	 emit_kil(c, args[0]);
-	 break;
-
-      default:
-         printf("unsupport opcode %d in fragment program\n",
-               inst->opcode);
-      }
-
-      for (i = 0; i < 4; i++)
-	if (inst->dst[i] && inst->dst[i]->spill_slot)
-	   emit_spill(c,
-		      inst->dst[i]->hw_reg,
-		      inst->dst[i]->spill_slot);
-   }
-}
diff --git a/src/mesa/pipe/i965simple/brw_wm_pass0.c b/src/mesa/pipe/i965simple/brw_wm_pass0.c
deleted file mode 100644
index 2ec3ac00c1..0000000000
--- a/src/mesa/pipe/i965simple/brw_wm_pass0.c
+++ /dev/null
@@ -1,466 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-
-#include "brw_context.h"
-#include "brw_wm.h"
-
-
-#if 0
-/***********************************************************************
- */
-
-static struct brw_wm_ref *get_ref( struct brw_wm_compile *c )
-{
-   assert(c->nr_refs < BRW_WM_MAX_REF);
-   return &c->refs[c->nr_refs++];
-}
-
-static struct brw_wm_value *get_value( struct brw_wm_compile *c)
-{
-   assert(c->nr_refs < BRW_WM_MAX_VREG);
-   return &c->vreg[c->nr_vreg++];
-}
-
-static struct brw_wm_instruction *get_instruction( struct brw_wm_compile *c )
-{
-   assert(c->nr_insns < BRW_WM_MAX_INSN);
-   return &c->instruction[c->nr_insns++];
-}
-
-/***********************************************************************
- */
-
-static void pass0_init_undef( struct brw_wm_compile *c)
-{
-   struct brw_wm_ref *ref = &c->undef_ref;
-   ref->value = &c->undef_value;
-   ref->hw_reg = brw_vec8_grf(0, 0);
-   ref->insn = 0;
-   ref->prevuse = NULL;
-}
-
-static void pass0_set_fpreg_value( struct brw_wm_compile *c,
-				   unsigned file,
-				   unsigned idx,
-				   unsigned component,
-				   struct brw_wm_value *value )
-{
-   struct brw_wm_ref *ref = get_ref(c);
-   ref->value = value;
-   ref->hw_reg = brw_vec8_grf(0, 0);
-   ref->insn = 0;
-   ref->prevuse = NULL;
-   c->pass0_fp_reg[file][idx][component] = ref;
-}
-
-static void pass0_set_fpreg_ref( struct brw_wm_compile *c,
-				 unsigned file,
-				 unsigned idx,
-				 unsigned component,
-				 const struct brw_wm_ref *src_ref )
-{
-   c->pass0_fp_reg[file][idx][component] = src_ref;
-}
-
-static const struct brw_wm_ref *get_param_ref( struct brw_wm_compile *c,
-					       const float *param_ptr )
-{
-   unsigned i = c->prog_data.nr_params++;
-
-   if (i >= BRW_WM_MAX_PARAM) {
-      _mesa_printf("%s: out of params\n", __FUNCTION__);
-      c->prog_data.error = 1;
-      return NULL;
-   }
-   else {
-      struct brw_wm_ref *ref = get_ref(c);
-
-      c->prog_data.param[i] = param_ptr;
-      c->nr_creg = (i+16)/16;
-
-      /* Push the offsets into hw_reg.  These will be added to the
-       * real register numbers once one is allocated in pass2.
-       */
-      ref->hw_reg = brw_vec1_grf((i&8)?1:0, i%8);
-      ref->value = &c->creg[i/16];
-      ref->insn = 0;
-      ref->prevuse = NULL;
-
-      return ref;
-   }
-}
-
-
-static const struct brw_wm_ref *get_const_ref( struct brw_wm_compile *c,
-					       const float *constval )
-{
-   unsigned i;
-
-   /* Search for an existing const value matching the request:
-    */
-   for (i = 0; i < c->nr_constrefs; i++) {
-      if (c->constref[i].constval == *constval)
-	 return c->constref[i].ref;
-   }
-
-   /* Else try to add a new one:
-    */
-   if (c->nr_constrefs < BRW_WM_MAX_CONST) {
-      unsigned i = c->nr_constrefs++;
-
-      /* A constant is a special type of parameter:
-       */
-      c->constref[i].constval = *constval;
-      c->constref[i].ref = get_param_ref(c, constval);
-
-      return c->constref[i].ref;
-   }
-   else {
-      _mesa_printf("%s: out of constrefs\n", __FUNCTION__);
-      c->prog_data.error = 1;
-      return NULL;
-   }
-}
-
-
-/* Lookup our internal registers
- */
-static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
-					       unsigned file,
-					       unsigned idx,
-					       unsigned component )
-{
-   const struct brw_wm_ref *ref = c->pass0_fp_reg[file][idx][component];
-
-   if (!ref) {
-      switch (file) {
-      case PROGRAM_INPUT:
-      case PROGRAM_PAYLOAD:
-      case PROGRAM_TEMPORARY:
-      case PROGRAM_OUTPUT:
-      case PROGRAM_VARYING:
-	 break;
-
-      case PROGRAM_LOCAL_PARAM:
-	 ref = get_param_ref(c, &c->fp->program.Base.LocalParams[idx][component]);
-	 break;
-
-      case PROGRAM_ENV_PARAM:
-	 ref = get_param_ref(c, &c->env_param[idx][component]);
-	 break;
-
-      case PROGRAM_STATE_VAR:
-      case PROGRAM_UNIFORM:
-      case PROGRAM_CONSTANT:
-      case PROGRAM_NAMED_PARAM: {
-	 struct gl_program_parameter_list *plist = c->fp->program.Base.Parameters;
-
-	 /* There's something really hokey about parameters parsed in
-	  * arb programs - they all end up in here, whether they be
-	  * state values, paramters or constants.  This duplicates the
-	  * structure above & also seems to subvert the limits set for
-	  * each type of constant/param.
-	  */
-	 switch (plist->Parameters[idx].Type) {
-	 case PROGRAM_NAMED_PARAM:
-	 case PROGRAM_CONSTANT:
-	    /* These are invarient:
-	     */
-	    ref = get_const_ref(c, &plist->ParameterValues[idx][component]);
-	    break;
-
-	 case PROGRAM_STATE_VAR:
-	 case PROGRAM_UNIFORM:
-	    /* These may change from run to run:
-	     */
-	    ref = get_param_ref(c, &plist->ParameterValues[idx][component] );
-	    break;
-
-	 default:
-	    assert(0);
-	    break;
-	 }
-	 break;
-      }
-
-      default:
-	 assert(0);
-	 break;
-      }
-
-      c->pass0_fp_reg[file][idx][component] = ref;
-   }
-
-   if (!ref)
-      ref = &c->undef_ref;
-
-   return ref;
-}
-
-
-
-
-/***********************************************************************
- * Straight translation to internal instruction format
- */
-
-static void pass0_set_dst( struct brw_wm_compile *c,
-			   struct brw_wm_instruction *out,
-			   const struct prog_instruction *inst,
-			   unsigned writemask )
-{
-   const struct prog_dst_register *dst = &inst->DstReg;
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      if (writemask & (1<<i)) {
-	 out->dst[i] = get_value(c);
-
-	 pass0_set_fpreg_value(c, dst->File, dst->Index, i, out->dst[i]);
-      }
-   }
-
-   out->writemask = writemask;
-}
-
-
-static void pass0_set_dst_scalar( struct brw_wm_compile *c,
-				  struct brw_wm_instruction *out,
-				  const struct prog_instruction *inst,
-				  unsigned writemask )
-{
-   if (writemask) {
-      const struct prog_dst_register *dst = &inst->DstReg;
-      unsigned i;
-
-      /* Compute only the first (X) value:
-       */
-      out->writemask = WRITEMASK_X;
-      out->dst[0] = get_value(c);
-
-      /* Update our tracking register file for all the components in
-       * writemask:
-       */
-      for (i = 0; i < 4; i++) {
-	 if (writemask & (1<<i)) {
-	    pass0_set_fpreg_value(c, dst->File, dst->Index, i, out->dst[0]);
-	 }
-      }
-   }
-   else
-      out->writemask = 0;
-}
-
-
-
-static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c,
-						    struct prog_src_register src,
-						    unsigned i )
-{
-   unsigned component = GET_SWZ(src.Swizzle,i);
-   const struct brw_wm_ref *src_ref;
-   static const float const_zero = 0.0;
-   static const float const_one = 1.0;
-
-
-   if (component == SWIZZLE_ZERO)
-      src_ref = get_const_ref(c, &const_zero);
-   else if (component == SWIZZLE_ONE)
-      src_ref = get_const_ref(c, &const_one);
-   else
-      src_ref = pass0_get_reg(c, src.File, src.Index, component);
-
-   return src_ref;
-}
-
-
-static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c,
-				       struct prog_src_register src,
-				       unsigned i,
-				       struct brw_wm_instruction *insn)
-{
-   const struct brw_wm_ref *ref = get_fp_src_reg_ref(c, src, i);
-   struct brw_wm_ref *newref = get_ref(c);
-
-   newref->value = ref->value;
-   newref->hw_reg = ref->hw_reg;
-
-   if (insn) {
-      newref->insn = insn - c->instruction;
-      newref->prevuse = newref->value->lastuse;
-      newref->value->lastuse = newref;
-   }
-
-   if (src.NegateBase & (1<<i))
-      newref->hw_reg.negate ^= 1;
-
-   if (src.Abs) {
-      newref->hw_reg.negate = 0;
-      newref->hw_reg.abs = 1;
-   }
-
-   return newref;
-}
-
-
-
-static struct brw_wm_instruction *translate_insn( struct brw_wm_compile *c,
-						  const struct prog_instruction *inst )
-{
-   struct brw_wm_instruction *out = get_instruction(c);
-   unsigned writemask = inst->DstReg.WriteMask;
-   unsigned nr_args = brw_wm_nr_args(inst->Opcode);
-   unsigned i, j;
-
-   /* Copy some data out of the instruction
-    */
-   out->opcode = inst->Opcode;
-   out->saturate = (inst->SaturateMode != SATURATE_OFF);
-   out->tex_unit = inst->TexSrcUnit;
-   out->tex_idx = inst->TexSrcTarget;
-
-   /* Args:
-    */
-   for (i = 0; i < nr_args; i++) {
-      for (j = 0; j < 4; j++) {
-	 out->src[i][j] = get_new_ref(c, inst->SrcReg[i], j, out);
-      }
-   }
-
-   /* Dst:
-    */
-   if (brw_wm_is_scalar_result(out->opcode))
-      pass0_set_dst_scalar(c, out, inst, writemask);
-   else
-      pass0_set_dst(c, out, inst, writemask);
-
-   return out;
-}
-
-
-
-/***********************************************************************
- * Optimize moves and swizzles away:
- */
-static void pass0_precalc_mov( struct brw_wm_compile *c,
-			       const struct prog_instruction *inst )
-{
-   const struct prog_dst_register *dst = &inst->DstReg;
-   unsigned writemask = inst->DstReg.WriteMask;
-   unsigned i;
-
-   /* Get the effect of a MOV by manipulating our register table:
-    */
-   for (i = 0; i < 4; i++) {
-      if (writemask & (1<<i)) {
-	 pass0_set_fpreg_ref( c, dst->File, dst->Index, i,
-			      get_new_ref(c, inst->SrcReg[0], i, NULL));
-      }
-   }
-}
-
-
-/* Initialize payload "registers".
- */
-static void pass0_init_payload( struct brw_wm_compile *c )
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      unsigned j = i >= c->key.nr_depth_regs ? 0 : i;
-      pass0_set_fpreg_value( c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, i,
-			     &c->payload.depth[j] );
-   }
-
-#if 0
-   /* This seems to be an alternative to the INTERP_WPOS stuff I do
-    * elsewhere:
-    */
-   if (c->key.source_depth_reg)
-      pass0_set_fpreg_value(c, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, 2,
-			    &c->payload.depth[c->key.source_depth_reg/2]);
-#endif
-
-   for (i = 0; i < FRAG_ATTRIB_MAX; i++)
-      pass0_set_fpreg_value( c, PROGRAM_PAYLOAD, i, 0,
-			     &c->payload.input_interp[i] );
-}
-
-/***********************************************************************
- * PASS 0
- *
- * Work forwards to give each calculated value a unique number.  Where
- * an instruction produces duplicate values (eg DP3), all are given
- * the same number.
- *
- * Translate away swizzling and eliminate non-saturating moves.
- */
-void brw_wm_pass0( struct brw_wm_compile *c )
-{
-   unsigned insn;
-
-   c->nr_vreg = 0;
-   c->nr_insns = 0;
-
-   pass0_init_undef(c);
-   pass0_init_payload(c);
-
-   for (insn = 0; insn < c->nr_fp_insns; insn++) {
-      const struct prog_instruction *inst = &c->prog_instructions[insn];
-
-
-      /* Optimize away moves, otherwise emit translated instruction:
-       */
-      switch (inst->Opcode) {
-      case OPCODE_MOV:
-      case OPCODE_SWZ:
-	 if (!inst->SaturateMode) {
-	    pass0_precalc_mov(c, inst);
-	 }
-	 else {
-	    translate_insn(c, inst);
-	 }
-	 break;
-
-
-      default:
-	 translate_insn(c, inst);
-	 break;
-      }
-   }
-
-   if (BRW_DEBUG & DEBUG_WM) {
-      brw_wm_print_program(c, "pass0");
-   }
-}
-
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_wm_pass1.c b/src/mesa/pipe/i965simple/brw_wm_pass1.c
deleted file mode 100644
index e6736bd6df..0000000000
--- a/src/mesa/pipe/i965simple/brw_wm_pass1.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-
-#include "brw_context.h"
-#include "brw_wm.h"
-
-#if 0
-static unsigned get_tracked_mask(struct brw_wm_compile *c,
-			       struct brw_wm_instruction *inst)
-{
-   unsigned i;
-   for (i = 0; i < 4; i++) {
-      if (inst->writemask & (1<<i)) {
-	 if (!inst->dst[i]->contributes_to_output) {
-	    inst->writemask &= ~(1<<i);
-	    inst->dst[i] = 0;
-	 }
-      }
-   }
-
-   return inst->writemask;
-}
-
-/* Remove a reference from a value's usage chain.
- */
-static void unlink_ref(struct brw_wm_ref *ref)
-{
-   struct brw_wm_value *value = ref->value;
-
-   if (ref == value->lastuse) {
-      value->lastuse = ref->prevuse;
-   } else {
-      struct brw_wm_ref *i = value->lastuse;
-      while (i->prevuse != ref) i = i->prevuse;
-      i->prevuse = ref->prevuse;
-   }
-}
-
-static void track_arg(struct brw_wm_compile *c,
-		      struct brw_wm_instruction *inst,
-		      unsigned arg,
-		      unsigned readmask)
-{
-   unsigned i;
-
-   for (i = 0; i < 4; i++) {
-      struct brw_wm_ref *ref = inst->src[arg][i];
-      if (ref) {
-	 if (readmask & (1<<i))
-	    ref->value->contributes_to_output = 1;
-	 else {
-	    unlink_ref(ref);
-	    inst->src[arg][i] = NULL;
-	 }
-      }
-   }
-}
-
-static unsigned get_texcoord_mask( unsigned tex_idx )
-{
-   switch (tex_idx) {
-   case TEXTURE_1D_INDEX: return WRITEMASK_X;
-   case TEXTURE_2D_INDEX: return WRITEMASK_XY;
-   case TEXTURE_3D_INDEX: return WRITEMASK_XYZ;
-   case TEXTURE_CUBE_INDEX: return WRITEMASK_XYZ;
-   case TEXTURE_RECT_INDEX: return WRITEMASK_XY;
-   default: return 0;
-   }
-}
-
-/* Step two: Basically this is dead code elimination.
- *
- * Iterate backwards over instructions, noting which values
- * contribute to the final result.  Adjust writemasks to only
- * calculate these values.
- */
-void brw_wm_pass1( struct brw_wm_compile *c )
-{
-   int insn;
-
-   for (insn = c->nr_insns-1; insn >= 0; insn--) {
-      struct brw_wm_instruction *inst = &c->instruction[insn];
-      unsigned writemask;
-      unsigned read0, read1, read2;
-
-      if (inst->opcode == OPCODE_KIL) {
-	 track_arg(c, inst, 0, WRITEMASK_XYZW); /* All args contribute to final */
-	 continue;
-      }
-
-      if (inst->opcode == WM_FB_WRITE) {
-	 track_arg(c, inst, 0, WRITEMASK_XYZW);
-	 track_arg(c, inst, 1, WRITEMASK_XYZW);
-	 if (c->key.source_depth_to_render_target &&
-	     c->key.computes_depth)
-	    track_arg(c, inst, 2, WRITEMASK_Z);
-	 else
-	    track_arg(c, inst, 2, 0);
-	 continue;
-      }
-
-      /* Lookup all the registers which were written by this
-       * instruction and get a mask of those that contribute to the output:
-       */
-      writemask = get_tracked_mask(c, inst);
-      if (!writemask) {
-	 unsigned arg;
-	 for (arg = 0; arg < 3; arg++)
-	    track_arg(c, inst, arg, 0);
-	 continue;
-      }
-
-      read0 = 0;
-      read1 = 0;
-      read2 = 0;
-
-      /* Mark all inputs which contribute to the marked outputs:
-       */
-      switch (inst->opcode) {
-      case OPCODE_ABS:
-      case OPCODE_FLR:
-      case OPCODE_FRC:
-      case OPCODE_MOV:
-	 read0 = writemask;
-	 break;
-
-      case OPCODE_SUB:
-      case OPCODE_SLT:
-      case OPCODE_SLE:
-      case OPCODE_SGE:
-      case OPCODE_SGT:
-      case OPCODE_SEQ:
-      case OPCODE_SNE:
-      case OPCODE_ADD:
-      case OPCODE_MAX:
-      case OPCODE_MIN:
-      case OPCODE_MUL:
-	 read0 = writemask;
-	 read1 = writemask;
-	 break;
-
-      case OPCODE_MAD:
-      case OPCODE_CMP:
-      case OPCODE_LRP:
-	 read0 = writemask;
-	 read1 = writemask;
-	 read2 = writemask;
-	 break;
-
-      case OPCODE_XPD:
-	 if (writemask & WRITEMASK_X) read0 |= WRITEMASK_YZ;
-	 if (writemask & WRITEMASK_Y) read0 |= WRITEMASK_XZ;
-	 if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY;
-	 read1 = read0;
-	 break;
-
-      case OPCODE_COS:
-      case OPCODE_EX2:
-      case OPCODE_LG2:
-      case OPCODE_RCP:
-      case OPCODE_RSQ:
-      case OPCODE_SIN:
-      case OPCODE_SCS:
-      case WM_CINTERP:
-      case WM_PIXELXY:
-	 read0 = WRITEMASK_X;
-	 break;
-
-      case OPCODE_POW:
-	 read0 = WRITEMASK_X;
-	 read1 = WRITEMASK_X;
-	 break;
-
-      case OPCODE_TEX:
-	 read0 = get_texcoord_mask(inst->tex_idx);
-
-	 if (c->key.shadowtex_mask & (1<<inst->tex_unit))
-	    read0 |= WRITEMASK_Z;
-	 break;
-
-      case OPCODE_TXB:
-	 /* Shadow ignored for txb.
-	  */
-	 read0 = get_texcoord_mask(inst->tex_idx) | WRITEMASK_W;
-	 break;
-
-      case WM_WPOSXY:
-	 read0 = writemask & WRITEMASK_XY;
-	 break;
-
-      case WM_DELTAXY:
-	 read0 = writemask & WRITEMASK_XY;
-	 read1 = WRITEMASK_X;
-	 break;
-
-      case WM_PIXELW:
-	 read0 = WRITEMASK_X;
-	 read1 = WRITEMASK_XY;
-	 break;
-
-      case WM_LINTERP:
-	 read0 = WRITEMASK_X;
-	 read1 = WRITEMASK_XY;
-	 break;
-
-      case WM_PINTERP:
-	 read0 = WRITEMASK_X; /* interpolant */
-	 read1 = WRITEMASK_XY; /* deltas */
-	 read2 = WRITEMASK_W; /* pixel w */
-	 break;
-
-      case OPCODE_DP3:
-	 read0 = WRITEMASK_XYZ;
-	 read1 = WRITEMASK_XYZ;
-	 break;
-
-      case OPCODE_DPH:
-	 read0 = WRITEMASK_XYZ;
-	 read1 = WRITEMASK_XYZW;
-	 break;
-
-      case OPCODE_DP4:
-	 read0 = WRITEMASK_XYZW;
-	 read1 = WRITEMASK_XYZW;
-	 break;
-
-      case OPCODE_LIT:
-	 read0 = WRITEMASK_XYW;
-	 break;
-
-      case OPCODE_SWZ:
-      case OPCODE_DST:
-      case OPCODE_TXP:
-      default:
-	 break;
-      }
-
-      track_arg(c, inst, 0, read0);
-      track_arg(c, inst, 1, read1);
-      track_arg(c, inst, 2, read2);
-   }
-
-   if (BRW_DEBUG & DEBUG_WM) {
-      brw_wm_print_program(c, "pass1");
-   }
-}
-
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_wm_pass2.c b/src/mesa/pipe/i965simple/brw_wm_pass2.c
deleted file mode 100644
index b1b404706f..0000000000
--- a/src/mesa/pipe/i965simple/brw_wm_pass2.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **********************************************************************/
- /*
-  * Authors:
-  *   Keith Whitwell <keith@tungstengraphics.com>
-  */
-
-
-#include "brw_context.h"
-#include "brw_wm.h"
-
-#if 0
-/* Use these to force spilling so that that functionality can be
- * tested with known-good examples rather than having to construct new
- * tests.
- */
-#define TEST_PAYLOAD_SPILLS 0
-#define TEST_DST_SPILLS 0
-
-static void spill_value(struct brw_wm_compile *c,
-			struct brw_wm_value *value);
-
-static void prealloc_reg(struct brw_wm_compile *c,
-			 struct brw_wm_value *value,
-			 unsigned reg)
-{
-   if (value->lastuse) {
-      /* Set nextuse to zero, it will be corrected by
-       * update_register_usage().
-       */
-      c->pass2_grf[reg].value = value;
-      c->pass2_grf[reg].nextuse = 0;
-
-      value->resident = &c->pass2_grf[reg];
-      value->hw_reg = brw_vec8_grf(reg*2, 0);
-
-      if (TEST_PAYLOAD_SPILLS)
-	 spill_value(c, value);
-   }
-}
-
-
-/* Initialize all the register values.  Do the initial setup
- * calculations for interpolants.
- */
-static void init_registers( struct brw_wm_compile *c )
-{
-   unsigned inputs = FRAG_BIT_WPOS | c->fp_interp_emitted;
-   unsigned nr_interp_regs = 0;
-   unsigned i = 0;
-   unsigned j;
-
-   for (j = 0; j < c->grf_limit; j++)
-      c->pass2_grf[j].nextuse = BRW_WM_MAX_INSN;
-
-   for (j = 0; j < c->key.nr_depth_regs; j++)
-      prealloc_reg(c, &c->payload.depth[j], i++);
-
-   for (j = 0; j < c->nr_creg; j++)
-      prealloc_reg(c, &c->creg[j], i++);
-
-   for (j = 0; j < FRAG_ATTRIB_MAX; j++)
-      if (inputs & (1<<j)) {
-	 nr_interp_regs++;
-	 prealloc_reg(c, &c->payload.input_interp[j], i++);
-      }
-
-   assert(nr_interp_regs >= 1);
-
-   c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2;
-   c->prog_data.urb_read_length = nr_interp_regs * 2;
-   c->prog_data.curb_read_length = c->nr_creg * 2;
-
-   c->max_wm_grf = i * 2;
-}
-
-
-/* Update the nextuse value for each register in our file.
- */
-static void update_register_usage(struct brw_wm_compile *c,
-				  unsigned thisinsn)
-{
-   unsigned i;
-
-   for (i = 1; i < c->grf_limit; i++) {
-      struct brw_wm_grf *grf = &c->pass2_grf[i];
-
-      /* Only search those which can change:
-       */
-      if (grf->nextuse < thisinsn) {
-	 struct brw_wm_ref *ref = grf->value->lastuse;
-
-	 /* Has last use of value been passed?
-	  */
-	 if (ref->insn < thisinsn) {
-	    grf->value->resident = 0;
-	    grf->value = 0;
-	    grf->nextuse = BRW_WM_MAX_INSN;
-	 }
-	 else {
-	    /* Else loop through chain to update:
-	     */
-	    while (ref->prevuse && ref->prevuse->insn >= thisinsn)
-	       ref = ref->prevuse;
-
-	    grf->nextuse = ref->insn;
-	 }
-      }
-   }
-}
-
-
-static void spill_value(struct brw_wm_compile *c,
-			struct brw_wm_value *value)
-{
-   /* Allocate a spill slot.  Note that allocations start from 0x40 -
-    * the first slot is reserved to mean "undef" in brw_wm_emit.c
-    */
-   if (!value->spill_slot) {
-      c->last_scratch += 0x40;
-      value->spill_slot = c->last_scratch;
-   }
-
-   /* The spill will be done in brw_wm_emit.c immediately after the
-    * value is calculated, so we can just take this reg without any
-    * further work.
-    */
-   value->resident->value = NULL;
-   value->resident->nextuse = BRW_WM_MAX_INSN;
-   value->resident = NULL;
-}
-
-
-
-/* Search for contiguous region with the most distant nearest
- * member.  Free regs count as very distant.
- *
- * TODO: implement spill-to-reg so that we can rearrange discontigous
- * free regs and then spill the oldest non-free regs in sequence.
- * This would mean inserting instructions in this pass.
- */
-static unsigned search_contiguous_regs(struct brw_wm_compile *c,
-				     unsigned nr,
-				     unsigned thisinsn)
-{
-   struct brw_wm_grf *grf = c->pass2_grf;
-   unsigned furthest = 0;
-   unsigned reg = 0;
-   unsigned i, j;
-
-   /* Start search at 1: r0 is special and can't be used or spilled.
-    */
-   for (i = 1; i < c->grf_limit && furthest < BRW_WM_MAX_INSN; i++) {
-      unsigned group_nextuse = BRW_WM_MAX_INSN;
-
-      for (j = 0; j < nr; j++) {
-	 if (grf[i+j].nextuse < group_nextuse)
-	    group_nextuse = grf[i+j].nextuse;
-      }
-
-      if (group_nextuse > furthest) {
-	 furthest = group_nextuse;
-	 reg = i;
-      }
-   }
-
-   assert(furthest != thisinsn);
-
-   /* Any non-empty regs will need to be spilled:
-    */
-   for (j = 0; j < nr; j++)
-      if (grf[reg+j].value)
-	 spill_value(c, grf[reg+j].value);
-
-   return reg;
-}
-
-
-static void alloc_contiguous_dest(struct brw_wm_compile *c,
-				  struct brw_wm_value *dst[],
-				  unsigned nr,
-				  unsigned thisinsn)
-{
-   unsigned reg = search_contiguous_regs(c, nr, thisinsn);
-   unsigned i;
-
-   for (i = 0; i < nr; i++) {
-      if (!dst[i]) {
-	 /* Need to grab a dummy value in TEX case.  Don't introduce
-	  * it into the tracking scheme.
-	  */
-	 dst[i] = &c->vreg[c->nr_vreg++];
-      }
-      else {
-	 assert(!dst[i]->resident);
-	 assert(c->pass2_grf[reg+i].nextuse != thisinsn);
-
-	 c->pass2_grf[reg+i].value = dst[i];
-	 c->pass2_grf[reg+i].nextuse = thisinsn;
-
-	 dst[i]->resident = &c->pass2_grf[reg+i];
-      }
-
-      dst[i]->hw_reg = brw_vec8_grf((reg+i)*2, 0);
-   }
-
-   if ((reg+nr)*2 > c->max_wm_grf)
-      c->max_wm_grf = (reg+nr) * 2;
-}
-
-
-static void load_args(struct brw_wm_compile *c,
-		      struct brw_wm_instruction *inst)
-{
-   unsigned thisinsn = inst - c->instruction;
-   unsigned i,j;
-
-   for (i = 0; i < 3; i++) {
-      for (j = 0; j < 4; j++) {
-	 struct brw_wm_ref *ref = inst->src[i][j];
-
-	 if (ref) {
-	    if (!ref->value->resident) {
-	       /* Need to bring the value in from scratch space.  The code for
-		* this will be done in brw_wm_emit.c, here we just do the
-		* register allocation and mark the ref as requiring a fill.
-		*/
-	       unsigned reg = search_contiguous_regs(c, 1, thisinsn);
-
-	       c->pass2_grf[reg].value = ref->value;
-	       c->pass2_grf[reg].nextuse = thisinsn;
-
-	       ref->value->resident = &c->pass2_grf[reg];
-
-	       /* Note that a fill is required:
-		*/
-	       ref->unspill_reg = reg*2;
-	    }
-
-	    /* Adjust the hw_reg to point at the value's current location:
-	     */
-	    assert(ref->value == ref->value->resident->value);
-	    ref->hw_reg.nr += (ref->value->resident - c->pass2_grf) * 2;
-	 }
-      }
-   }
-}
-
-
-
-/* Step 3: Work forwards once again.  Perform register allocations,
- * taking into account instructions like TEX which require contiguous
- * result registers.  Where necessary spill registers to scratch space
- * and reload later.
- */
-void brw_wm_pass2( struct brw_wm_compile *c )
-{
-   unsigned insn;
-   unsigned i;
-
-   init_registers(c);
-
-   for (insn = 0; insn < c->nr_insns; insn++) {
-      struct brw_wm_instruction *inst = &c->instruction[insn];
-
-      /* Update registers' nextuse values:
-       */
-      update_register_usage(c, insn);
-
-      /* May need to unspill some args.
-       */
-      load_args(c, inst);
-
-      /* Allocate registers to hold results:
-       */
-      switch (inst->opcode) {
-      case OPCODE_TEX:
-      case OPCODE_TXB:
-      case OPCODE_TXP:
-	 alloc_contiguous_dest(c, inst->dst, 4, insn);
-	 break;
-
-      default:
-	 for (i = 0; i < 4; i++) {
-	    if (inst->writemask & (1<<i)) {
-	       assert(inst->dst[i]);
-	       alloc_contiguous_dest(c, &inst->dst[i], 1, insn);
-	    }
-	 }
-	 break;
-      }
-
-      if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY)
-	 for (i = 0; i < 4; i++)
-	    if (inst->dst[i])
-	       spill_value(c, inst->dst[i]);
-
-   }
-
-   if (BRW_DEBUG & DEBUG_WM) {
-      brw_wm_print_program(c, "pass2");
-   }
-
-   c->state = PASS2_DONE;
-
-   if (BRW_DEBUG & DEBUG_WM) {
-       brw_wm_print_program(c, "pass2/done");
-   }
-}
-
-#endif
diff --git a/src/mesa/pipe/i965simple/brw_wm_surface_state.c b/src/mesa/pipe/i965simple/brw_wm_surface_state.c
index c04fd57494..844cfc54a9 100644
--- a/src/mesa/pipe/i965simple/brw_wm_surface_state.c
+++ b/src/mesa/pipe/i965simple/brw_wm_surface_state.c
@@ -147,7 +147,7 @@ void brw_update_texture_surface( GLcontext *ctx,
 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 
    /* Updated in emit_reloc */
-   surf.ss1.base_addr = intelObj->mt->region->buffer->offset;
+   surf.ss1.base_addr = brw_buffer_offset( intelObj->mt->region->buffer );
 
    surf.ss2.mip_count = intelObj->lastLevel - intelObj->firstLevel;
    surf.ss2.width = firstImage->Width - 1;
@@ -198,6 +198,8 @@ static void upload_wm_surfaces(struct brw_context *brw )
 
 	 surf.ss0.surface_type = BRW_SURFACE_2D;
 
+	 surf.ss1.base_addr = brw_buffer_offset( region->buffer );
+
 	 surf.ss2.width = region->pitch - 1; /* XXX: not really! */
 	 surf.ss2.height = region->height - 1;
 	 surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
@@ -218,6 +220,9 @@ static void upload_wm_surfaces(struct brw_context *brw )
       surf.ss0.writedisable_blue =  !brw->attribs.Color->ColorMask[2];
       surf.ss0.writedisable_alpha = !brw->attribs.Color->ColorMask[3];
 
+
+
+
       brw->wm.bind.surf_ss_offset[0] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
 
       brw->wm.nr_surfaces = 1;
@@ -251,6 +256,11 @@ static void upload_wm_surfaces(struct brw_context *brw )
 					    &brw->wm.bind );
 }
 
+
+/* KW: Will find a different way to acheive this, see for example the
+ * state caches with relocs in the i915 swz driver.
+ */
+#if 0
 static void emit_reloc_wm_surfaces(struct brw_context *brw)
 {
    int unit;
@@ -281,6 +291,9 @@ static void emit_reloc_wm_surfaces(struct brw_context *brw)
       }
    }
 }
+#endif
+
+
 
 const struct brw_tracked_state brw_wm_surfaces = {
    .dirty = {
@@ -289,6 +302,5 @@ const struct brw_tracked_state brw_wm_surfaces = {
       .cache = 0
    },
    .update = upload_wm_surfaces,
-   .emit_reloc = emit_reloc_wm_surfaces,
 };
 #endif