diff options
author | Brian <brian.paul@tungstengraphics.com> | 2007-08-23 19:03:42 -0600 |
---|---|---|
committer | Brian <brian.paul@tungstengraphics.com> | 2007-08-23 19:03:42 -0600 |
commit | e967b246ecdc665d9f974d1e35380cb1cd11d61e (patch) | |
tree | 62fa8017c148482090984066532824b8b6b98426 /src/mesa/pipe/tgsi | |
parent | 30236573dadd83714220b72b0c04f1bbce69fbd6 (diff) |
Vertex shader outputs are now tightly packed into the output slots.
Fix softpipe vertex attribute setup.
Also, update vs constants when the projection matrix changes (fixes samples/prim.c)
Diffstat (limited to 'src/mesa/pipe/tgsi')
-rw-r--r-- | src/mesa/pipe/tgsi/mesa/mesa_to_tgsi.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/src/mesa/pipe/tgsi/mesa/mesa_to_tgsi.c b/src/mesa/pipe/tgsi/mesa/mesa_to_tgsi.c index 993d220c50..f33a702958 100644 --- a/src/mesa/pipe/tgsi/mesa/mesa_to_tgsi.c +++ b/src/mesa/pipe/tgsi/mesa/mesa_to_tgsi.c @@ -348,7 +348,9 @@ map_register_file_index( break;
case TGSI_FILE_OUTPUT:
+ /*
assert( usage_bitmask == 0x0 );
+ */
if( processor == TGSI_PROCESSOR_FRAGMENT ) {
/* depth result -> index 0
* color results -> index 1, 2, ...
@@ -362,8 +364,14 @@ map_register_file_index( }
}
else {
+ /* vertex output slots are tightly packed, find mapped pos */
/* mapped_index = VERT_RESULT_x */
- mapped_index = index;
+ mapped_index = 0;
+ for( i = 0; i < index; i++ ) {
+ if( usage_bitmask & (1 << i) ) {
+ mapped_index++;
+ }
+ }
}
break;
@@ -434,6 +442,7 @@ compile_instruction( const struct prog_instruction *inst,
struct tgsi_full_instruction *fullinst,
GLuint inputs_read,
+ GLuint outputs_written,
GLuint preamble_size,
GLuint processor )
{
@@ -453,7 +462,8 @@ compile_instruction( processor,
fulldst->DstRegister.File,
inst->DstReg.Index,
- 0x0 );
+ outputs_written
+ );
fulldst->DstRegister.WriteMask = convert_writemask( inst->DstReg.WriteMask );
for( i = 0; i < fullinst->Instruction.NumSrcRegs; i++ ) {
@@ -921,6 +931,7 @@ tgsi_mesa_compile_fp_program( &program->Base.Instructions[i],
&fullinst,
inputs_read,
+ ~0, /*outputs_written*/
preamble_size,
TGSI_PROCESSOR_FRAGMENT ) ) {
assert( i == program->Base.NumInstructions - 1 );
@@ -952,6 +963,9 @@ tgsi_mesa_compile_vp_program( struct tgsi_processor *processor;
struct tgsi_full_instruction fullinst;
GLuint inputs_read = ~0;
+ GLuint outputs_written;
+
+ outputs_written = program->Base.OutputsWritten;
*(struct tgsi_version *) &tokens[0] = tgsi_build_version();
@@ -968,6 +982,7 @@ tgsi_mesa_compile_vp_program( &program->Base.Instructions[i],
&fullinst,
inputs_read,
+ outputs_written,
0,
TGSI_PROCESSOR_VERTEX ) ) {
assert( i == program->Base.NumInstructions - 1 );
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