Merge remote branch 'main/master' into radeon-rewrite

Conflicts:
	src/mesa/drivers/dri/r300/r300_cmdbuf.c
	src/mesa/drivers/dri/r300/r300_state.c
	src/mesa/drivers/dri/r300/r300_swtcl.c
	src/mesa/drivers/dri/r300/radeon_ioctl.c
	src/mesa/drivers/dri/radeon/radeon_screen.c

1 files changed, 31 insertions, 37 deletions

diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index c649b3db5e..4adce11f95 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -38,6 +38,9 @@
 #define PROG_INSTRUCTION_H
 
 
+#include "main/mfeatures.h"
+
+
 /**
  * Swizzle indexes.
  * Do not change!
@@ -240,12 +243,21 @@ typedef enum prog_opcode {
 
 
 /**
+ * Number of bits for the src/dst register Index field.
+ * This limits the size of temp/uniform register files.
+ */
+#define INST_INDEX_BITS 10
+
+
+/**
  * Instruction source register.
  */
 struct prog_src_register
 {
    GLuint File:4;	/**< One of the PROGRAM_* register file values. */
-   GLint Index:9;	/**< May be negative for relative addressing. */
+   GLint Index:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit.
+                                     * May be negative for relative addressing.
+                                     */
    GLuint Swizzle:12;
    GLuint RelAddr:1;
 
@@ -289,7 +301,7 @@ struct prog_src_register
 struct prog_dst_register
 {
    GLuint File:4;      /**< One of the PROGRAM_* register file values */
-   GLuint Index:8;
+   GLuint Index:INST_INDEX_BITS;  /**< Unsigned, never negative */
    GLuint WriteMask:4;
    GLuint RelAddr:1;
 
@@ -322,8 +334,7 @@ struct prog_dst_register
     */
    GLuint CondSrc:1;
    /*@}*/
-
-   GLuint pad:30;
+   GLuint pad:28;
 };
 
 
@@ -333,14 +344,6 @@ struct prog_dst_register
 struct prog_instruction
 {
    gl_inst_opcode Opcode;
-#if FEATURE_MESA_program_debug
-   GLshort StringPos;
-#endif
-   /**
-    * Arbitrary data.  Used for the PRINT, CAL, and BRA instructions.
-    */
-   void *Data;
-
    struct prog_src_register SrcReg[3];
    struct prog_dst_register DstReg;
 
@@ -380,7 +383,7 @@ struct prog_instruction
    GLuint SaturateMode:2;
    
    /**
-    * Per-instruction selectable precision.
+    * Per-instruction selectable precision: FLOAT32, FLOAT16, FIXED12.
     *
     * \since
     * NV_fragment_program, NV_fragment_program_option.
@@ -388,45 +391,36 @@ struct prog_instruction
    GLuint Precision:3;
 
    /**
-    * \name Texture source controls.
-    * 
-    * The texture source controls are only used with the \c TEX, \c TXD,
-    * \c TXL, and \c TXP instructions.
-    *
-    * \since
-    * ARB_fragment_program, NV_fragment_program, NV_vertex_program3.
+    * \name Extra fields for TEX, TXB, TXD, TXL, TXP instructions.
     */
    /*@{*/
-   /**
-    * Source texture unit.  OpenGL supports a maximum of 32 texture
-    * units.
-    */
+   /** Source texture unit. */
    GLuint TexSrcUnit:5;
    
-   /**
-    * Source texture target, one of TEXTURE_{1D,2D,3D,CUBE,RECT}_INDEX.
-    */
+   /** Source texture target, one of TEXTURE_{1D,2D,3D,CUBE,RECT}_INDEX */
    GLuint TexSrcTarget:3;
+
+   /** True if tex instruction should do shadow comparison */
+   GLuint TexShadow:1;
    /*@}*/
 
    /**
     * For BRA and CAL instructions, the location to jump to.
     * For BGNLOOP, points to ENDLOOP (and vice-versa).
     * For BRK, points to BGNLOOP (which points to ENDLOOP).
-    * For IF, points to else or endif.
-    * For ELSE, points to endif.
+    * For IF, points to ELSE or ENDIF.
+    * For ELSE, points to ENDIF.
     */
    GLint BranchTarget;
 
-#if 01 /* XXX just use this for i965 driver for now! */
-   /**
-    * For TEX instructions in shaders, the sampler to use for the
-    * texture lookup.
-    */
-   GLint Sampler;
-#endif
-
+   /** for debugging purposes */
    const char *Comment;
+
+   /** Arbitrary data.  Used for OPCODE_PRINT and some drivers */
+   void *Data;
+
+   /** for driver use (try to remove someday) */
+   GLint Aux;
 };