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authorIan Romanick <ian.d.romanick@intel.com>2009-09-04 17:27:27 -0700
committerIan Romanick <ian.d.romanick@intel.com>2009-09-04 17:31:05 -0700
commitd0adebb8d5ef680590b0f281a20516318c0b8b62 (patch)
tree57ca66f2b1144e7080189de37e80250faa964f79 /src/mesa/shader/program_parse.tab.h
parent9ea4319744fb7474635cb1994e1babe1552d4d4f (diff)
NV fp parser: Support instruction and TEMP / OUTPUT sizes
Adds support for declaring TEMP and OUTPUT variables as 'LONG' or 'SHORT' precision. The precision specifiers are parsed, but they are currently ignored. Some support for this may be added in the future, but neither Intel hardware nor, as far as I'm aware, Radeon hardware support multiple precisions. Also adds support for instruction precision ('X', 'H', and 'R') suffixes and instruction condition code output ('C') suffix. This results in a fairly major change to the lexer. Instructions are matched with all the possible suffix strings. The suffix string are then carved off by a context (i.e., which program mode and options are set) aware parser that converts the suffixes to bits in prog_instruction. This could have been handled in the same way _SAT was originally handled in the lexer, but it would have resulted in a very large lexer with lots of opportunity for cut-and-paste errors.
Diffstat (limited to 'src/mesa/shader/program_parse.tab.h')
0 files changed, 0 insertions, 0 deletions