NV fp parser: Support instruction and TEMP / OUTPUT sizes

Adds support for declaring TEMP and OUTPUT variables as 'LONG' or
'SHORT' precision.  The precision specifiers are parsed, but they are
currently ignored.  Some support for this may be added in the future,
but neither Intel hardware nor, as far as I'm aware, Radeon hardware
support multiple precisions.

Also adds support for instruction precision ('X', 'H', and 'R')
suffixes and instruction condition code output ('C') suffix.  This
results in a fairly major change to the lexer.  Instructions are
matched with all the possible suffix strings.  The suffix string are
then carved off by a context (i.e., which program mode and options are
set) aware parser that converts the suffixes to bits in
prog_instruction.

This could have been handled in the same way _SAT was originally
handled in the lexer, but it would have resulted in a very large lexer
with lots of opportunity for cut-and-paste errors.

1 files changed, 14 insertions, 0 deletions

diff --git a/src/mesa/shader/program_parser.h b/src/mesa/shader/program_parser.h
index be32a1bed1..497891f53d 100644
--- a/src/mesa/shader/program_parser.h
+++ b/src/mesa/shader/program_parser.h
@@ -264,4 +264,18 @@ extern int _mesa_ARBvp_parse_option(struct asm_parser_state *state,
 extern int _mesa_ARBfp_parse_option(struct asm_parser_state *state,
     const char *option);
 
+/**
+ * Parses and processes instruction suffixes
+ *
+ * Instruction suffixes, such as \c _SAT, are processed.  The relevant bits
+ * are set in \c inst.  If suffixes are encountered that are either not known
+ * or not supported by the modes and options set in \c state, zero will be
+ * returned.
+ *
+ * \return
+ * Non-zero on success, zero on failure.
+ */
+extern int _mesa_parse_instruction_suffix(const struct asm_parser_state *state,
+    const char *suffix, struct prog_instruction *inst);
+
 /*@}*/