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authorBrian Paul <brianp@vmware.com>2009-03-04 15:21:13 -0700
committerBrian Paul <brianp@vmware.com>2009-03-04 15:24:03 -0700
commitc751224b0acd457d99cead45616980fec7ef78f1 (patch)
tree5609f99505e60f3c8e98459d97ce54e0c8b87481 /src/mesa/x86
parentf0c92d96568780d5a6c6b53845e9689893ce99e4 (diff)
mesa: refactor x86 code
Move _mesa_init_all_x86_transform_asm() into x86.c so that common_x86.c has no dependencies on the vertex transformation code. Plus some comments and clean-ups.
Diffstat (limited to 'src/mesa/x86')
-rw-r--r--src/mesa/x86/common_x86.c75
-rw-r--r--src/mesa/x86/common_x86_asm.h4
-rw-r--r--src/mesa/x86/x86.c50
3 files changed, 77 insertions, 52 deletions
diff --git a/src/mesa/x86/common_x86.c b/src/mesa/x86/common_x86.c
index 5321547935..18b1c2243c 100644
--- a/src/mesa/x86/common_x86.c
+++ b/src/mesa/x86/common_x86.c
@@ -52,7 +52,10 @@
#include "common_x86_asm.h"
-int _mesa_x86_cpu_features = 0;
+/** Bitmask of X86_FEATURE_x bits */
+int _mesa_x86_cpu_features = 0x0;
+
+
/* No reason for this to be public.
*/
@@ -73,9 +76,12 @@ extern GLuint _ASMAPI _mesa_x86_cpuid_edx(GLuint op);
* kernels provide full SSE support on all processors that expose SSE via
* the CPUID mechanism.
*/
+
+/* These are assembly functions: */
extern void _mesa_test_os_sse_support( void );
extern void _mesa_test_os_sse_exception_support( void );
+
#if defined(WIN32)
#ifndef STATUS_FLOAT_MULTIPLE_TRAPS
# define STATUS_FLOAT_MULTIPLE_TRAPS (0xC00002B5L)
@@ -107,7 +113,11 @@ static LONG WINAPI ExceptionFilter(LPEXCEPTION_POINTERS exp)
#endif /* WIN32 */
-static void check_os_sse_support( void )
+/**
+ * Check if SSE is supported.
+ * If not, turn off the X86_FEATURE_XMM flag in _mesa_x86_cpu_features.
+ */
+void _mesa_check_os_sse_support( void )
{
#if defined(__FreeBSD__)
{
@@ -187,10 +197,18 @@ static void check_os_sse_support( void )
#endif /* USE_SSE_ASM */
-void _mesa_init_all_x86_transform_asm( void )
+/**
+ * Initialize the _mesa_x86_cpu_features bitfield.
+ */
+void
+_mesa_get_x86_features(void)
{
#ifdef USE_X86_ASM
- _mesa_x86_cpu_features = 0;
+ _mesa_x86_cpu_features = 0x0;
+
+ if (_mesa_getenv( "MESA_NO_ASM")) {
+ return;
+ }
if (!_mesa_x86_has_cpuid()) {
_mesa_debug(NULL, "CPUID not detected\n");
@@ -263,52 +281,5 @@ void _mesa_init_all_x86_transform_asm( void )
}
}
-
- if ( _mesa_getenv( "MESA_NO_ASM" ) ) {
- _mesa_x86_cpu_features = 0;
- }
-
- if ( _mesa_x86_cpu_features ) {
- _mesa_init_x86_transform_asm();
- }
-
-#ifdef USE_MMX_ASM
- if ( cpu_has_mmx ) {
- if ( _mesa_getenv( "MESA_NO_MMX" ) == 0 ) {
- _mesa_debug(NULL, "MMX cpu detected.\n");
- } else {
- _mesa_x86_cpu_features &= ~(X86_FEATURE_MMX);
- }
- }
-#endif
-
-#ifdef USE_3DNOW_ASM
- if ( cpu_has_3dnow ) {
- if ( _mesa_getenv( "MESA_NO_3DNOW" ) == 0 ) {
- _mesa_debug(NULL, "3DNow! cpu detected.\n");
- _mesa_init_3dnow_transform_asm();
- } else {
- _mesa_x86_cpu_features &= ~(X86_FEATURE_3DNOW);
- }
- }
-#endif
-
-#ifdef USE_SSE_ASM
- if ( cpu_has_xmm ) {
- if ( _mesa_getenv( "MESA_NO_SSE" ) == 0 ) {
- _mesa_debug(NULL, "SSE cpu detected.\n");
- if ( _mesa_getenv( "MESA_FORCE_SSE" ) == 0 ) {
- check_os_sse_support();
- }
- if ( cpu_has_xmm ) {
- _mesa_init_sse_transform_asm();
- }
- } else {
- _mesa_debug(NULL, "SSE cpu detected, but switched off by user.\n");
- _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
- }
- }
-#endif
-#endif
+#endif /* USE_X86_ASM */
}
-
diff --git a/src/mesa/x86/common_x86_asm.h b/src/mesa/x86/common_x86_asm.h
index 89312b2437..c7cd11ab05 100644
--- a/src/mesa/x86/common_x86_asm.h
+++ b/src/mesa/x86/common_x86_asm.h
@@ -54,6 +54,10 @@
extern int _mesa_x86_cpu_features;
+extern void _mesa_get_x86_features(void);
+
+extern void _mesa_check_os_sse_support(void);
+
extern void _mesa_init_all_x86_transform_asm( void );
#endif
diff --git a/src/mesa/x86/x86.c b/src/mesa/x86/x86.c
index ce649f66b0..c2df5e31e6 100644
--- a/src/mesa/x86/x86.c
+++ b/src/mesa/x86/x86.c
@@ -34,6 +34,7 @@
#include "x86.h"
#include "common_x86_macros.h"
+#include "common_x86_asm.h"
#ifdef DEBUG_MATH
#include "math/m_debug.h"
@@ -93,3 +94,52 @@ void _mesa_init_x86_transform_asm( void )
#endif
}
+
+void _mesa_init_all_x86_transform_asm( void )
+{
+ _mesa_get_x86_features();
+
+#ifdef USE_X86_ASM
+ if ( _mesa_x86_cpu_features ) {
+ _mesa_init_x86_transform_asm();
+ }
+
+#ifdef USE_MMX_ASM
+ if ( cpu_has_mmx ) {
+ if ( _mesa_getenv( "MESA_NO_MMX" ) == 0 ) {
+ _mesa_debug(NULL, "MMX cpu detected.\n");
+ } else {
+ _mesa_x86_cpu_features &= ~(X86_FEATURE_MMX);
+ }
+ }
+#endif
+
+#ifdef USE_3DNOW_ASM
+ if ( cpu_has_3dnow ) {
+ if ( _mesa_getenv( "MESA_NO_3DNOW" ) == 0 ) {
+ _mesa_debug(NULL, "3DNow! cpu detected.\n");
+ _mesa_init_3dnow_transform_asm();
+ } else {
+ _mesa_x86_cpu_features &= ~(X86_FEATURE_3DNOW);
+ }
+ }
+#endif
+
+#ifdef USE_SSE_ASM
+ if ( cpu_has_xmm ) {
+ if ( _mesa_getenv( "MESA_NO_SSE" ) == 0 ) {
+ _mesa_debug(NULL, "SSE cpu detected.\n");
+ if ( _mesa_getenv( "MESA_FORCE_SSE" ) == 0 ) {
+ _mesa_check_os_sse_support();
+ }
+ if ( cpu_has_xmm ) {
+ _mesa_init_sse_transform_asm();
+ }
+ } else {
+ _mesa_debug(NULL, "SSE cpu detected, but switched off by user.\n");
+ _mesa_x86_cpu_features &= ~(X86_FEATURE_XMM);
+ }
+ }
+#endif
+#endif
+}