summaryrefslogtreecommitdiff
path: root/src/mesa
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2008-08-08 13:58:48 -0700
committerEric Anholt <eric@anholt.net>2008-08-08 14:00:43 -0700
commitd2796939f18815935c8fe1effb01fa9765d6c7d8 (patch)
tree207b657f757db711640029fe2e27ee657cbc04d0 /src/mesa
parent527e1cf172cb0a4d1f2891a351498669be1620cd (diff)
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c17
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c29
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_cc.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_state.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h19
-rw-r--r--src/mesa/drivers/dri/i965/brw_curbe.c19
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c72
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.h23
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c109
-rw-r--r--src/mesa/drivers/dri/i965/brw_fallback.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c7
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs_state.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c44
-rw-r--r--src/mesa/drivers/dri/i965/brw_sf.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_sf_state.c16
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c39
-rw-r--r--src/mesa/drivers/dri/i965/brw_urb.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_constval.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_state.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_tnl.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_sampler_state.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_state.c9
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c38
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c30
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h1
31 files changed, 245 insertions, 305 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 0af5ed0b50..40a50ff772 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -420,10 +420,12 @@ i830_emit_state(struct intel_context *intel)
{
struct i830_context *i830 = i830_context(&intel->ctx);
struct i830_hw_state *state = i830->current;
- int i, ret, count;
+ int i, count;
GLuint dirty;
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
+ dri_bo *aper_array[3 + I830_TEX_UNITS];
+ int aper_count;
/* We don't hold the lock at this point, so want to make sure that
* there won't be a buffer wrap between the state emits and the primitive
@@ -441,22 +443,23 @@ i830_emit_state(struct intel_context *intel)
LOOP_CLIPRECTS);
count = 0;
again:
+ aper_count = 0;
dirty = get_dirty(state);
- ret = 0;
+ aper_array[aper_count++] = intel->batch->buf;
if (dirty & I830_UPLOAD_BUFFERS) {
- ret |= dri_bufmgr_check_aperture_space(state->draw_region->buffer);
- ret |= dri_bufmgr_check_aperture_space(state->depth_region->buffer);
+ aper_array[aper_count++] = state->draw_region->buffer;
+ aper_array[aper_count++] = state->depth_region->buffer;
}
-
+
for (i = 0; i < I830_TEX_UNITS; i++)
if (dirty & I830_UPLOAD_TEX(i)) {
if (state->tex_buffer[i]) {
- ret |= dri_bufmgr_check_aperture_space(state->tex_buffer[i]);
+ aper_array[aper_count++] = state->tex_buffer[i];
}
}
- if (ret) {
+ if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
if (count == 0) {
count++;
intel_batchbuffer_flush(intel->batch);
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 27dfc2b890..19f2206285 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -297,9 +297,9 @@ i915_emit_state(struct intel_context *intel)
{
struct i915_context *i915 = i915_context(&intel->ctx);
struct i915_hw_state *state = i915->current;
- int i;
- int ret, count;
+ int i, count, aper_count;
GLuint dirty;
+ dri_bo *aper_array[3 + I915_TEX_UNITS];
GET_CURRENT_CONTEXT(ctx);
BATCH_LOCALS;
@@ -319,24 +319,27 @@ i915_emit_state(struct intel_context *intel)
LOOP_CLIPRECTS);
count = 0;
again:
+ aper_count = 0;
dirty = get_dirty(state);
- ret = 0;
+ aper_array[aper_count++] = intel->batch->buf;
if (dirty & I915_UPLOAD_BUFFERS) {
- ret |= dri_bufmgr_check_aperture_space(state->draw_region->buffer);
- if (state->depth_region)
- ret |= dri_bufmgr_check_aperture_space(state->depth_region->buffer);
+ aper_array[aper_count++] = state->draw_region->buffer;
+ if (state->depth_region)
+ aper_array[aper_count++] = state->depth_region->buffer;
}
if (dirty & I915_UPLOAD_TEX_ALL) {
- for (i = 0; i < I915_TEX_UNITS; i++)
- if (dirty & I915_UPLOAD_TEX(i)) {
- if (state->tex_buffer[i]) {
- ret |= dri_bufmgr_check_aperture_space(state->tex_buffer[i]);
- }
- }
+ for (i = 0; i < I915_TEX_UNITS; i++) {
+ if (dirty & I915_UPLOAD_TEX(i)) {
+ if (state->tex_buffer[i]) {
+ aper_array[aper_count++] = state->tex_buffer[i];
+ }
+ }
+ }
}
- if (ret) {
+
+ if (dri_bufmgr_check_aperture_space(aper_array, aper_count)) {
if (count == 0) {
count++;
intel_batchbuffer_flush(intel->batch);
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index 8714dd15f3..5f4b852212 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -92,8 +92,6 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
INTEL_VB_SIZE, 4);
intel->prim.start_offset = 0;
intel->prim.current_offset = 0;
-
- dri_bufmgr_check_aperture_space(intel->prim.vb_bo);
}
intel->prim.flush = intel_flush_prim;
@@ -109,6 +107,7 @@ uint32_t *intel_get_prim_space(struct intel_context *intel, unsigned int count)
void intel_flush_prim(struct intel_context *intel)
{
BATCH_LOCALS;
+ dri_bo *aper_array[2];
dri_bo *vb_bo;
/* Must be called after an intel_start_prim. */
@@ -127,6 +126,13 @@ void intel_flush_prim(struct intel_context *intel)
intel->vtbl.emit_state(intel);
+ aper_array[0] = intel->batch->buf;
+ aper_array[1] = vb_bo;
+ if (dri_bufmgr_check_aperture_space(aper_array, 2)) {
+ intel_batchbuffer_flush(intel->batch);
+ intel->vtbl.emit_state(intel);
+ }
+
/* Ensure that we don't start a new batch for the following emit, which
* depends on the state just emitted. emit_state should be making sure we
* have the space for this.
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index bad9c4a11e..d662cf7521 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -37,7 +37,7 @@
#include "macros.h"
#include "enums.h"
-static int prepare_cc_vp( struct brw_context *brw )
+static void prepare_cc_vp( struct brw_context *brw )
{
struct brw_cc_viewport ccv;
@@ -48,7 +48,6 @@ static int prepare_cc_vp( struct brw_context *brw )
dri_bo_unreference(brw->cc.vp_bo);
brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
- return dri_bufmgr_check_aperture_space(brw->cc.vp_bo);
}
const struct brw_tracked_state brw_cc_vp = {
@@ -266,7 +265,7 @@ cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
return bo;
}
-static int prepare_cc_unit( struct brw_context *brw )
+static void prepare_cc_unit( struct brw_context *brw )
{
struct brw_cc_unit_key key;
@@ -280,7 +279,6 @@ static int prepare_cc_unit( struct brw_context *brw )
if (brw->cc.state_bo == NULL)
brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
- return dri_bufmgr_check_aperture_space(brw->cc.state_bo);
}
const struct brw_tracked_state brw_cc_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index 540108e5f4..22981fd2d9 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -131,7 +131,7 @@ static void compile_clip_prog( struct brw_context *brw,
/* Calculate interpolants for triangle and line rasterization.
*/
-static int upload_clip_prog( struct brw_context *brw )
+static void upload_clip_prog(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
struct brw_clip_prog_key key;
@@ -242,8 +242,6 @@ static int upload_clip_prog( struct brw_context *brw )
&brw->clip.prog_data);
if (brw->clip.prog_bo == NULL)
compile_clip_prog( brw, &key );
-
- return dri_bufmgr_check_aperture_space(brw->clip.prog_bo);
}
diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 974cb77cb8..ae904c6253 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -129,10 +129,9 @@ clip_unit_create_from_key(struct brw_context *brw,
return bo;
}
-static int upload_clip_unit( struct brw_context *brw )
+static void upload_clip_unit( struct brw_context *brw )
{
struct brw_clip_unit_key key;
- int ret = 0;
clip_unit_populate_key(brw, &key);
@@ -144,9 +143,6 @@ static int upload_clip_unit( struct brw_context *brw )
if (brw->clip.state_bo == NULL) {
brw->clip.state_bo = clip_unit_create_from_key(brw, &key);
}
-
- ret = dri_bufmgr_check_aperture_space(brw->clip.state_bo);
- return ret;
}
const struct brw_tracked_state brw_clip_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 32e05542e0..330d5714da 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -135,6 +135,8 @@ struct brw_context;
#define BRW_NEW_METAOPS 0x1000
#define BRW_NEW_FENCE 0x2000
#define BRW_NEW_LOCK 0x4000
+#define BRW_NEW_INDICES 0x8000
+#define BRW_NEW_VERTICES 0x10000
/**
* Used for any batch entry with a relocated pointer that will be used
* by any 3D rendering.
@@ -332,7 +334,7 @@ struct brw_state_pointers {
*/
struct brw_tracked_state {
struct brw_state_flags dirty;
- int (*prepare)( struct brw_context *brw );
+ void (*prepare)( struct brw_context *brw );
void (*emit)( struct brw_context *brw );
};
@@ -450,9 +452,22 @@ struct brw_context
* for changes to this state:
*/
struct brw_vertex_info info;
+ unsigned int min_index, max_index;
} vb;
struct {
+ /**
+ * Index buffer for this draw_prims call.
+ *
+ * Updates are signaled by BRW_NEW_INDICES.
+ */
+ const struct _mesa_index_buffer *ib;
+
+ dri_bo *bo;
+ unsigned int offset;
+ } ib;
+
+ struct {
/* Will be allocated on demand if needed.
*/
struct brw_state_pointers attribs;
@@ -641,7 +656,7 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis,
/*======================================================================
* brw_state.c
*/
-int brw_validate_state( struct brw_context *brw );
+void brw_validate_state( struct brw_context *brw );
void brw_init_state( struct brw_context *brw );
void brw_destroy_state( struct brw_context *brw );
diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c
index 8047941602..0a3600193b 100644
--- a/src/mesa/drivers/dri/i965/brw_curbe.c
+++ b/src/mesa/drivers/dri/i965/brw_curbe.c
@@ -46,7 +46,7 @@
/* Partition the CURBE between the various users of constant values:
*/
-static int calculate_curbe_offsets( struct brw_context *brw )
+static void calculate_curbe_offsets( struct brw_context *brw )
{
/* CACHE_NEW_WM_PROG */
GLuint nr_fp_regs = (brw->wm.prog_data->nr_params + 15) / 16;
@@ -117,7 +117,6 @@ static int calculate_curbe_offsets( struct brw_context *brw )
brw->state.dirty.brw |= BRW_NEW_CURBE_OFFSETS;
}
- return 0;
}
@@ -171,7 +170,7 @@ static GLfloat fixed_plane[6][4] = {
* cache mechanism, but maybe would benefit from a comparison against
* the current uploaded set of constants.
*/
-static int prepare_constant_buffer(struct brw_context *brw)
+static void prepare_constant_buffer(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
struct brw_vertex_program *vp = (struct brw_vertex_program *)brw->vertex_program;
@@ -195,8 +194,8 @@ static int prepare_constant_buffer(struct brw_context *brw)
brw->curbe.last_buf = NULL;
brw->curbe.last_bufsz = 0;
}
-
- return 0;
+
+ return;
}
buf = (GLfloat *)malloc(bufsz);
@@ -321,9 +320,6 @@ static int prepare_constant_buffer(struct brw_context *brw)
* flushes as necessary when doublebuffering of CURBEs isn't
* possible.
*/
-
- /* check aperture space for this bo */
- return dri_bufmgr_check_aperture_space(brw->curbe.curbe_bo);
}
@@ -331,6 +327,13 @@ static void emit_constant_buffer(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
GLuint sz = brw->curbe.total_size;
+ dri_bo *aper_array[] = {
+ brw->intel.batch->buf,
+ brw->curbe.curbe_bo,
+ };
+
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(2, IGNORE_CLIPRECTS);
if (sz == 0) {
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index f90c5f7b08..d43b52c2c7 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -83,9 +83,8 @@ static const GLenum reduced_prim[GL_POLYGON+1] = {
* programs be immune to the active primitive (ie. cope with all
* possibilities). That may not be realistic however.
*/
-static GLuint brw_set_prim(struct brw_context *brw, GLenum prim, GLboolean *need_flush)
+static GLuint brw_set_prim(struct brw_context *brw, GLenum prim)
{
- int ret;
if (INTEL_DEBUG & DEBUG_PRIMS)
_mesa_printf("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim));
@@ -106,9 +105,7 @@ static GLuint brw_set_prim(struct brw_context *brw, GLenum prim, GLboolean *need
brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
}
- ret = brw_validate_state(brw);
- if (ret)
- *need_flush = GL_TRUE;
+ brw_validate_state(brw);
}
return hw_prim[prim];
@@ -131,7 +128,6 @@ static void brw_emit_prim( struct brw_context *brw,
{
struct brw_3d_primitive prim_packet;
- GLboolean need_flush = GL_FALSE;
if (INTEL_DEBUG & DEBUG_PRIMS)
_mesa_printf("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
@@ -140,7 +136,7 @@ static void brw_emit_prim( struct brw_context *brw,
prim_packet.header.opcode = CMD_3D_PRIM;
prim_packet.header.length = sizeof(prim_packet)/4 - 2;
prim_packet.header.pad = 0;
- prim_packet.header.topology = brw_set_prim(brw, prim->mode, &need_flush);
+ prim_packet.header.topology = brw_set_prim(brw, prim->mode);
prim_packet.header.indexed = prim->indexed;
prim_packet.verts_per_instance = trim(prim->mode, prim->count);
@@ -149,12 +145,13 @@ static void brw_emit_prim( struct brw_context *brw,
prim_packet.start_instance_location = 0;
prim_packet.base_vert_location = 0;
+ /* Can't wrap here, since we rely on the validated state. */
+ brw->no_batch_wrap = GL_TRUE;
if (prim_packet.verts_per_instance) {
intel_batchbuffer_data( brw->intel.batch, &prim_packet,
sizeof(prim_packet), LOOP_CLIPRECTS);
}
-
- assert(need_flush == GL_FALSE);
+ brw->no_batch_wrap = GL_FALSE;
}
static void brw_merge_inputs( struct brw_context *brw,
@@ -258,10 +255,6 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
struct brw_context *brw = brw_context(ctx);
GLboolean retval = GL_FALSE;
GLuint i;
- GLuint ib_offset;
- dri_bo *ib_bo;
- GLboolean force_flush = GL_FALSE;
- int ret;
if (ctx->NewState)
_mesa_update_state( ctx );
@@ -271,7 +264,13 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
/* Bind all inputs, derive varying and size information:
*/
brw_merge_inputs( brw, arrays );
-
+
+ brw->ib.ib = ib;
+ brw->state.dirty.brw |= BRW_NEW_INDICES;
+
+ brw->vb.min_index = min_index;
+ brw->vb.max_index = max_index;
+ brw->state.dirty.brw |= BRW_NEW_VERTICES;
/* Have to validate state quite late. Will rebuild tnl_program,
* which depends on varying information.
*
@@ -294,29 +293,18 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
* an upper bound of how much we might emit in a single
* brw_try_draw_prims().
*/
- flush:
- if (force_flush)
- brw->no_batch_wrap = GL_FALSE;
-
if (intel->batch->ptr - intel->batch->map > intel->batch->size * 3 / 4
/* brw_emit_prim may change the cliprect_mode to LOOP_CLIPRECTS */
- || intel->batch->cliprect_mode != LOOP_CLIPRECTS || (force_flush == GL_TRUE))
+ || intel->batch->cliprect_mode != LOOP_CLIPRECTS)
intel_batchbuffer_flush(intel->batch);
- force_flush = GL_FALSE;
- brw->no_batch_wrap = GL_TRUE;
-
/* Set the first primitive early, ahead of validate_state:
*/
- brw_set_prim(brw, prim[0].mode, &force_flush);
+ brw_set_prim(brw, prim[0].mode);
/* XXX: Need to separate validate and upload of state.
*/
- ret = brw_validate_state( brw );
- if (ret) {
- force_flush = GL_TRUE;
- goto flush;
- }
+ brw_validate_state( brw );
/* Various fallback checks:
*/
@@ -326,31 +314,6 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
if (check_fallbacks( brw, prim, nr_prims ))
goto out;
- /* need to account for index buffer and vertex buffer */
- if (ib) {
- ret = brw_prepare_indices( brw, ib , &ib_bo, &ib_offset);
- if (ret) {
- force_flush = GL_TRUE;
- goto flush;
- }
- }
-
- ret = brw_prepare_vertices( brw, min_index, max_index);
- if (ret < 0)
- goto out;
-
- if (ret > 0) {
- force_flush = GL_TRUE;
- goto flush;
- }
-
- /* Upload index, vertex data:
- */
- if (ib)
- brw_emit_indices( brw, ib, ib_bo, ib_offset);
-
- brw_emit_vertices( brw, min_index, max_index);
-
for (i = 0; i < nr_prims; i++) {
brw_emit_prim(brw, &prim[i]);
}
@@ -359,9 +322,6 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
}
out:
-
- brw->no_batch_wrap = GL_FALSE;
-
UNLOCK_HARDWARE(intel);
if (!retval)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.h b/src/mesa/drivers/dri/i965/brw_draw.h
index b3547400d4..2a3e0c1c5b 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.h
+++ b/src/mesa/drivers/dri/i965/brw_draw.h
@@ -51,27 +51,4 @@ void brw_draw_destroy( struct brw_context *brw );
void brw_init_current_values(GLcontext *ctx,
struct gl_client_array *arrays);
-
-/* brw_draw_upload.c
- */
-int brw_prepare_indices( struct brw_context *brw,
- const struct _mesa_index_buffer *index_buffer,
- dri_bo **bo_return,
- GLuint *offset_return);
-
-void brw_emit_indices( struct brw_context *brw,
- const struct _mesa_index_buffer *index_buffer,
- dri_bo *bo,
- GLuint offset);
-
-int brw_prepare_vertices( struct brw_context *brw,
- GLuint min_index,
- GLuint max_index );
-
-void brw_emit_vertices( struct brw_context *brw,
- GLuint min_index,
- GLuint max_index );
-
-
-
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 0181b06764..9427131440 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -302,9 +302,7 @@ copy_array_to_vbo_array( struct brw_context *brw,
dri_bo_unmap(element->bo);
}
-int brw_prepare_vertices( struct brw_context *brw,
- GLuint min_index,
- GLuint max_index )
+static void brw_prepare_vertices(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
struct intel_context *intel = intel_context(ctx);
@@ -312,7 +310,8 @@ int brw_prepare_vertices( struct brw_context *brw,
GLuint i;
const unsigned char *ptr = NULL;
GLuint interleave = 0;
- int ret = 0;
+ unsigned int min_index = brw->vb.min_index;
+ unsigned int max_index = brw->vb.max_index;
struct brw_vertex_element *enabled[VERT_ATTRIB_MAX];
GLuint nr_enabled = 0;
@@ -340,8 +339,10 @@ int brw_prepare_vertices( struct brw_context *brw,
* cases with > 17 vertex attributes enabled, so it probably
* isn't an issue at this point.
*/
- if (nr_enabled >= BRW_VEP_MAX)
- return -1;
+ if (nr_enabled >= BRW_VEP_MAX) {
+ intel->Fallback = 1;
+ return;
+ }
for (i = 0; i < nr_enabled; i++) {
struct brw_vertex_element *input = enabled[i];
@@ -359,8 +360,6 @@ int brw_prepare_vertices( struct brw_context *brw,
dri_bo_reference(input->bo);
input->offset = (unsigned long)input->glarray->Ptr;
input->stride = input->glarray->StrideB;
-
- ret |= dri_bufmgr_check_aperture_space(input->bo);
} else {
/* Queue the buffer object up to be uploaded in the next pass,
* when we've decided if we're doing interleaved or not.
@@ -369,7 +368,7 @@ int brw_prepare_vertices( struct brw_context *brw,
/* Position array not properly enabled:
*/
if (input->glarray->StrideB == 0)
- return -1;
+ return;
interleave = input->glarray->StrideB;
ptr = input->glarray->Ptr;
@@ -401,7 +400,6 @@ int brw_prepare_vertices( struct brw_context *brw,
*/
copy_array_to_vbo_array(brw, upload[0], interleave);
- ret |= dri_bufmgr_check_aperture_space(upload[0]->bo);
for (i = 1; i < nr_uploads; i++) {
/* Then, just point upload[i] at upload[0]'s buffer. */
upload[i]->stride = interleave;
@@ -415,23 +413,11 @@ int brw_prepare_vertices( struct brw_context *brw,
/* Upload non-interleaved arrays */
for (i = 0; i < nr_uploads; i++) {
copy_array_to_vbo_array(brw, upload[i], upload[i]->element_size);
- if (upload[i]->bo) {
- ret |= dri_bufmgr_check_aperture_space(upload[i]->bo);
- }
}
}
-
-
- if (ret)
- return 1;
-
-
- return 0;
}
-void brw_emit_vertices( struct brw_context *brw,
- GLuint min_index,
- GLuint max_index )
+static void brw_emit_vertices(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
struct intel_context *intel = intel_context(ctx);
@@ -469,7 +455,7 @@ void brw_emit_vertices( struct brw_context *brw,
OUT_RELOC(input->bo,
I915_GEM_DOMAIN_VERTEX, 0,
input->offset);
- OUT_BATCH(max_index);
+ OUT_BATCH(brw->vb.max_index);
OUT_BATCH(0); /* Instance data step rate */
/* Unreference the buffer so it can get freed, now that we won't
@@ -513,18 +499,31 @@ void brw_emit_vertices( struct brw_context *brw,
ADVANCE_BATCH();
}
-int brw_prepare_indices( struct brw_context *brw,
- const struct _mesa_index_buffer *index_buffer,
- dri_bo **bo_return,
- GLuint *offset_return)
+const struct brw_tracked_state brw_vertices = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH | BRW_NEW_VERTICES,
+ .cache = 0,
+ },
+ .prepare = brw_prepare_vertices,
+ .emit = brw_emit_vertices,
+};
+
+static void brw_prepare_indices(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
struct intel_context *intel = &brw->intel;
- GLuint ib_size = get_size(index_buffer->type) * index_buffer->count;
+ const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
+ GLuint ib_size;
dri_bo *bo;
- struct gl_buffer_object *bufferobj = index_buffer->obj;
- GLuint offset = (GLuint)index_buffer->ptr;
- int ret;
+ struct gl_buffer_object *bufferobj;
+ GLuint offset;
+
+ if (index_buffer == NULL)
+ return;
+
+ ib_size = get_size(index_buffer->type) * index_buffer->count;
+ bufferobj = index_buffer->obj;;
/* Turn into a proper VBO:
*/
@@ -538,6 +537,8 @@ int brw_prepare_indices( struct brw_context *brw,
*/
dri_bo_subdata(bo, offset, ib_size, index_buffer->ptr);
} else {
+ offset = (GLuint)index_buffer->ptr;
+
/* If the index buffer isn't aligned to its element size, we have to
* rebase it into a temporary.
*/
@@ -560,19 +561,22 @@ int brw_prepare_indices( struct brw_context *brw,
}
}
- *bo_return = bo;
- *offset_return = offset;
- ret = dri_bufmgr_check_aperture_space(bo);
- return ret;
+ dri_bo_unreference(brw->ib.bo);
+ brw->ib.bo = bo;
+ brw->ib.offset = offset;
}
-void brw_emit_indices(struct brw_context *brw,
- const struct _mesa_index_buffer *index_buffer,
- dri_bo *bo,
- GLuint offset)
+static void brw_emit_indices(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
- GLuint ib_size = get_size(index_buffer->type) * index_buffer->count;
+ const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
+ GLuint ib_size;
+
+ if (index_buffer == NULL)
+ return;
+
+ ib_size = get_size(index_buffer->type) * index_buffer->count;
+
/* Emit the indexbuffer packet:
*/
{
@@ -588,16 +592,23 @@ void brw_emit_indices(struct brw_context *brw,
BEGIN_BATCH(4, IGNORE_CLIPRECTS);
OUT_BATCH( ib.header.dword );
- OUT_RELOC( bo,
- I915_GEM_DOMAIN_VERTEX, 0,
- offset);
- OUT_RELOC( bo,
- I915_GEM_DOMAIN_VERTEX, 0,
- offset + ib_size);
+ OUT_RELOC(brw->ib.bo,
+ I915_GEM_DOMAIN_VERTEX, 0,
+ brw->ib.offset);
+ OUT_RELOC(brw->ib.bo,
+ I915_GEM_DOMAIN_VERTEX, 0,
+ brw->ib.offset + ib_size);
OUT_BATCH( 0 );
ADVANCE_BATCH();
-
- dri_bo_unreference(bo);
}
}
+const struct brw_tracked_state brw_indices = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH | BRW_NEW_INDICES,
+ .cache = 0,
+ },
+ .prepare = brw_prepare_indices,
+ .emit = brw_emit_indices,
+};
diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c
index 8a8fb50cb9..693f68f32a 100644
--- a/src/mesa/drivers/dri/i965/brw_fallback.c
+++ b/src/mesa/drivers/dri/i965/brw_fallback.c
@@ -95,10 +95,9 @@ static GLboolean do_check_fallback(struct brw_context *brw)
return GL_FALSE;
}
-static int check_fallback(struct brw_context *brw)
+static void check_fallback(struct brw_context *brw)
{
brw->intel.Fallback = do_check_fallback(brw);
- return 0;
}
const struct brw_tracked_state brw_check_fallback = {
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 9419315c7a..2daef0093b 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -162,10 +162,9 @@ static void populate_key( struct brw_context *brw,
/* Calculate interpolants for triangle and line rasterization.
*/
-static int prepare_gs_prog( struct brw_context *brw )
+static void prepare_gs_prog(struct brw_context *brw)
{
struct brw_gs_prog_key key;
- int ret = 0;
/* Populate the key:
*/
populate_key(brw, &key);
@@ -183,11 +182,7 @@ static int prepare_gs_prog( struct brw_context *brw )
&brw->gs.prog_data);
if (brw->gs.prog_bo == NULL)
compile_gs_prog( brw, &key );
-
- ret |= dri_bufmgr_check_aperture_space(brw->gs.prog_bo);
}
-
- return ret;
}
diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
index ae6b48a517..ff2e3ab059 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
@@ -116,7 +116,7 @@ gs_unit_create_from_key(struct brw_context *brw, struct brw_gs_unit_key *key)
return bo;
}
-static int prepare_gs_unit( struct brw_context *brw )
+static void prepare_gs_unit(struct brw_context *brw)
{
struct brw_gs_unit_key key;
@@ -130,7 +130,6 @@ static int prepare_gs_unit( struct brw_context *brw )
if (brw->gs.state_bo == NULL) {
brw->gs.state_bo = gs_unit_create_from_key(brw, &key);
}
- return dri_bufmgr_check_aperture_space(brw->gs.state_bo);
}
const struct brw_tracked_state brw_gs_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 9634d649dd..487c638ce2 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -81,6 +81,13 @@ const struct brw_tracked_state brw_blend_constant_color = {
static void upload_binding_table_pointers(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
+ dri_bo *aper_array[] = {
+ intel->batch->buf,
+ brw->wm.bind_bo,
+ };
+
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
@@ -135,6 +142,19 @@ static void upload_pipelined_state_pointers(struct brw_context *brw )
static void upload_psp_urb_cbs(struct brw_context *brw )
{
+ struct intel_context *intel = &brw->intel;
+ dri_bo *aper_array[] = {
+ intel->batch->buf,
+ brw->vs.state_bo,
+ brw->gs.state_bo,
+ brw->clip.state_bo,
+ brw->wm.state_bo,
+ brw->cc.state_bo,
+ };
+
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ intel_batchbuffer_flush(intel->batch);
+
upload_pipelined_state_pointers(brw);
brw_upload_urb_fence(brw);
brw_upload_constant_buffer_state(brw);
@@ -155,22 +175,6 @@ const struct brw_tracked_state brw_psp_urb_cbs = {
.emit = upload_psp_urb_cbs,
};
-/**
- * Upload the depthbuffer offset and format.
- *
- * We have to do this per state validation as we need to emit the relocation
- * in the batch buffer.
- */
-
-static int prepare_depthbuffer(struct brw_context *brw)
-{
- struct intel_region *region = brw->state.depth_region;
-
- if (!region || !region->buffer)
- return 0;
- return dri_bufmgr_check_aperture_space(region->buffer);
-}
-
static void emit_depthbuffer(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
@@ -192,6 +196,10 @@ static void emit_depthbuffer(struct brw_context *brw)
ADVANCE_BATCH();
} else {
unsigned int format;
+ dri_bo *aper_array[] = {
+ intel->batch->buf,
+ region->buffer
+ };
switch (region->cpp) {
case 2:
@@ -208,6 +216,9 @@ static void emit_depthbuffer(struct brw_context *brw)
return;
}
+ if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
+ intel_batchbuffer_flush(intel->batch);
+
BEGIN_BATCH(len, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
OUT_BATCH(((region->pitch * region->cpp) - 1) |
@@ -236,7 +247,6 @@ const struct brw_tracked_state brw_depthbuffer = {
.brw = BRW_NEW_DEPTH_BUFFER | BRW_NEW_BATCH,
.cache = 0,
},
- .prepare = prepare_depthbuffer,
.emit = emit_depthbuffer,
};
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c
index 0b61748321..5bb9e11310 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.c
+++ b/src/mesa/drivers/dri/i965/brw_sf.c
@@ -125,7 +125,7 @@ static void compile_sf_prog( struct brw_context *brw,
/* Calculate interpolants for triangle and line rasterization.
*/
-static int upload_sf_prog( struct brw_context *brw )
+static void upload_sf_prog(struct brw_context *brw)
{
struct brw_sf_prog_key key;
@@ -174,7 +174,6 @@ static int upload_sf_prog( struct brw_context *brw )
&brw->sf.prog_data);
if (brw->sf.prog_bo == NULL)
compile_sf_prog( brw, &key );
- return dri_bufmgr_check_aperture_space(brw->sf.prog_bo);
}
diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c
index cbed301d31..2478872b82 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_state.c
@@ -37,7 +37,7 @@
#include "macros.h"
#include "intel_fbo.h"
-static int upload_sf_vp(struct brw_context *brw)
+static void upload_sf_vp(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
@@ -98,8 +98,6 @@ static int upload_sf_vp(struct brw_context *brw)
dri_bo_unreference(brw->sf.vp_bo);
brw->sf.vp_bo = brw_cache_data( &brw->cache, BRW_SF_VP, &sfv, NULL, 0 );
-
- return dri_bufmgr_check_aperture_space(brw->sf.vp_bo);
}
const struct brw_tracked_state brw_sf_vp = {
@@ -269,11 +267,10 @@ sf_unit_create_from_key(struct brw_context *brw, struct brw_sf_unit_key *key,
return bo;
}
-static int upload_sf_unit( struct brw_context *brw )
+static void upload_sf_unit( struct brw_context *brw )
{
struct brw_sf_unit_key key;
dri_bo *reloc_bufs[2];
- int ret = 0;
sf_unit_populate_key(brw, &key);
@@ -288,15 +285,6 @@ static int upload_sf_unit( struct brw_context *brw )
if (brw->sf.state_bo == NULL) {
brw->sf.state_bo = sf_unit_create_from_key(brw, &key, reloc_bufs);
}
-
- if (reloc_bufs[0])
- ret |= dri_bufmgr_check_aperture_space(reloc_bufs[0]);
-
- if (reloc_bufs[1])
- ret |= dri_bufmgr_check_aperture_space(reloc_bufs[1]);
-
- ret |= dri_bufmgr_check_aperture_space(brw->sf.state_bo);
- return ret;
}
const struct brw_tracked_state brw_sf_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index d1fca051ec..3ea6151ae9 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -80,6 +80,9 @@ const struct brw_tracked_state brw_pipe_control;
const struct brw_tracked_state brw_clear_surface_cache;
const struct brw_tracked_state brw_clear_batch_cache;
+const struct brw_tracked_state brw_indices;
+const struct brw_tracked_state brw_vertices;
+
/***********************************************************************
* brw_state_cache.c
*/
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index b8dfcf5b03..d1d319d92e 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -101,6 +101,8 @@ const struct brw_tracked_state *atoms[] =
&brw_psp_urb_cbs,
#endif
+ &brw_indices,
+ &brw_vertices,
NULL, /* brw_constant_buffer */
};
@@ -172,10 +174,12 @@ static void xor_states( struct brw_state_flags *result,
/***********************************************************************
* Emit all state:
*/
-int brw_validate_state( struct brw_context *brw )
+void brw_validate_state( struct brw_context *brw )
{
+ struct intel_context *intel = &brw->intel;
struct brw_state_flags *state = &brw->state.dirty;
- GLuint i, ret, count;
+ GLuint i, count, pass = 0;
+ dri_bo *last_batch_bo = NULL;
state->mesa |= brw->intel.NewGLState;
brw->intel.NewGLState = 0;
@@ -201,7 +205,7 @@ int brw_validate_state( struct brw_context *brw )
if (state->mesa == 0 &&
state->cache == 0 &&
state->brw == 0)
- return 0;
+ return;
if (brw->state.dirty.brw & BRW_NEW_CONTEXT)
brw_clear_batch_cache_flush(brw);
@@ -219,15 +223,23 @@ int brw_validate_state( struct brw_context *brw )
if (check_state(state, &atom->dirty)) {
if (atom->prepare) {
- ret = atom->prepare(brw);
- if (ret)
- return ret;
+ atom->prepare(brw);
}
}
}
if (brw->intel.Fallback)
- return 0;
+ return;
+
+ /* We're about to try to set up a coherent state in the batchbuffer for
+ * the emission of primitives. If we exceed the aperture size in any of the
+ * emit() calls, we need to go back to square 1 and try setting up again.
+ */
+got_flushed:
+ dri_bo_unreference(last_batch_bo);
+ last_batch_bo = intel->batch->buf;
+ dri_bo_reference(last_batch_bo);
+ assert(pass++ <= 2);
if (INTEL_DEBUG) {
/* Debug version which enforces various sanity checks on the
@@ -250,8 +262,11 @@ int brw_validate_state( struct brw_context *brw )
break;
if (check_state(state, &atom->dirty)) {
- if (atom->emit)
+ if (atom->emit) {
atom->emit( brw );
+ if (intel->batch->buf != last_batch_bo)
+ goto got_flushed;
+ }
}
accumulate_state(&examined, &atom->dirty);
@@ -273,13 +288,17 @@ int brw_validate_state( struct brw_context *brw )
break;
if (check_state(state, &atom->dirty)) {
- if (atom->emit)
+ if (atom->emit) {
atom->emit( brw );
+ if (intel->batch->buf != last_batch_bo)
+ goto got_flushed;
+ }
}
}
}
+ dri_bo_unreference(last_batch_bo);
+
if (!brw->intel.Fallback)
memset(state, 0, sizeof(*state));
- return 0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c
index 244c82169a..1116ade0a4 100644
--- a/src/mesa/drivers/dri/i965/brw_urb.c
+++ b/src/mesa/drivers/dri/i965/brw_urb.c
@@ -74,7 +74,7 @@ static GLboolean check_urb_layout( struct brw_context *brw )
/* Most minimal update, forces re-emit of URB fence packet after GS
* unit turned on/off.
*/
-static int recalculate_urb_fence( struct brw_context *brw )
+static void recalculate_urb_fence( struct brw_context *brw )
{
GLuint csize = brw->curbe.total_size;
GLuint vsize = brw->vs.prog_data->urb_entry_size;
@@ -142,7 +142,6 @@ static int recalculate_urb_fence( struct brw_context *brw )
brw->state.dirty.brw |= BRW_NEW_URB_FENCE;
}
- return 0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index f89b0e14a1..1db7ceebcf 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -83,7 +83,7 @@ static void do_vs_prog( struct brw_context *brw,
}
-static int brw_upload_vs_prog( struct brw_context *brw )
+static void brw_upload_vs_prog(struct brw_context *brw)
{
struct brw_vs_prog_key key;
struct brw_vertex_program *vp =
@@ -115,7 +115,6 @@ static int brw_upload_vs_prog( struct brw_context *brw )
&brw->vs.prog_data);
if (brw->vs.prog_bo == NULL)
do_vs_prog(brw, vp, &key);
- return dri_bufmgr_check_aperture_space(brw->vs.prog_bo);
}
diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c
index a0106b8975..734a926e96 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_constval.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c
@@ -166,7 +166,7 @@ static GLuint get_input_size(struct brw_context *brw,
/* Calculate sizes of vertex program outputs. Size is the largest
* component index which might vary from [0,0,0,1]
*/
-static int calc_wm_input_sizes( struct brw_context *brw )
+static void calc_wm_input_sizes( struct brw_context *brw )
{
/* BRW_NEW_VERTEX_PROGRAM */
struct brw_vertex_program *vp =
@@ -210,7 +210,6 @@ static int calc_wm_input_sizes( struct brw_context *brw )
memcpy(brw->wm.input_size_masks, t.size_masks, sizeof(t.size_masks));
brw->state.dirty.brw |= BRW_NEW_WM_INPUT_DIMENSIONS;
}
- return 0;
}
const struct brw_tracked_state brw_wm_input_sizes = {
diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index e18cd42f4e..909b942610 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -124,7 +124,7 @@ vs_unit_create_from_key(struct brw_context *brw, struct brw_vs_unit_key *key)
return bo;
}
-static int prepare_vs_unit( struct brw_context *brw )
+static void prepare_vs_unit(struct brw_context *brw)
{
struct brw_vs_unit_key key;
@@ -138,7 +138,6 @@ static int prepare_vs_unit( struct brw_context *brw )
if (brw->vs.state_bo == NULL) {
brw->vs.state_bo = vs_unit_create_from_key(brw, &key);
}
- return dri_bufmgr_check_aperture_space(brw->vs.state_bo);
}
const struct brw_tracked_state brw_vs_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_vs_tnl.c b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
index e409620bbf..2caa020e61 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_tnl.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_tnl.c
@@ -1581,7 +1581,7 @@ static GLuint hash_key( struct state_key *key )
return hash;
}
-static int prepare_tnl_program( struct brw_context *brw )
+static void prepare_tnl_program( struct brw_context *brw )
{
GLcontext *ctx = &brw->intel.ctx;
struct state_key key;
@@ -1590,7 +1590,7 @@ static int prepare_tnl_program( struct brw_context *brw )
/* _NEW_PROGRAM */
if (brw->attribs.VertexProgram->_Current)
- return 0;
+ return;
/* Grab all the relevent state and put it in a single structure:
*/
@@ -1623,7 +1623,7 @@ static int prepare_tnl_program( struct brw_context *brw )
if (old != brw->tnl_program)
brw->state.dirty.brw |= BRW_NEW_TNL_PROGRAM;
- return 0;
+ return;
}
/* Note: See brw_draw.c - the vertex program must not rely on
@@ -1649,7 +1649,7 @@ const struct brw_tracked_state brw_tnl_vertprog = {
-static int prepare_active_vertprog( struct brw_context *brw )
+static void prepare_active_vertprog( struct brw_context *brw )
{
const struct gl_vertex_program *prev = brw->vertex_program;
@@ -1664,8 +1664,6 @@ static int prepare_active_vertprog( struct brw_context *brw )
if (brw->vertex_program != prev)
brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
-
- return 0;
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index acbaf178d4..93ae8dc693 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -325,7 +325,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
}
-static int brw_prepare_wm_prog( struct brw_context *brw )
+static void brw_prepare_wm_prog(struct brw_context *brw)
{
struct brw_wm_prog_key key;
struct brw_fragment_program *fp = (struct brw_fragment_program *)
@@ -342,8 +342,6 @@ static int brw_prepare_wm_prog( struct brw_context *brw )
&brw->wm.prog_data);
if (brw->wm.prog_bo == NULL)
do_wm_prog(brw, fp, &key);
-
- return dri_bufmgr_check_aperture_space(brw->wm.prog_bo);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
index 461f977aac..08d01823de 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c
@@ -255,11 +255,10 @@ brw_wm_sampler_populate_key(struct brw_context *brw,
* complicates various things. However, this is still too confusing -
* FIXME: simplify all the different new texture state flags.
*/
-static int upload_wm_samplers( struct brw_context *brw )
+static void upload_wm_samplers( struct brw_context *brw )
{
struct wm_sampler_key key;
int i;
- int ret = 0;
brw_wm_sampler_populate_key(brw, &key);
@@ -271,7 +270,7 @@ static int upload_wm_samplers( struct brw_context *brw )
dri_bo_unreference(brw->wm.sampler_bo);
brw->wm.sampler_bo = NULL;
if (brw->wm.sampler_count == 0)
- return 0;
+ return;
brw->wm.sampler_bo = brw_search_cache(&brw->cache, BRW_SAMPLER,
&key, sizeof(key),
@@ -304,7 +303,6 @@ static int upload_wm_samplers( struct brw_context *brw )
if (!brw->attribs.Texture->Unit[i]._ReallyEnabled)
continue;
- ret |= dri_bufmgr_check_aperture_space(brw->wm.sdc_bo[i]);
intel_bo_emit_reloc(brw->wm.sampler_bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
0,
@@ -313,10 +311,6 @@ static int upload_wm_samplers( struct brw_context *brw )
brw->wm.sdc_bo[i]);
}
}
-
- ret |= dri_bufmgr_check_aperture_space(brw->wm.sampler_bo);
- return ret;
-
}
const struct brw_tracked_state brw_wm_samplers = {
diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index 6fe30f0a9a..f97d0dc285 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -227,12 +227,11 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
}
-static int upload_wm_unit( struct brw_context *brw )
+static void upload_wm_unit( struct brw_context *brw )
{
struct intel_context *intel = &brw->intel;
struct brw_wm_unit_key key;
dri_bo *reloc_bufs[3];
- int ret = 0, i;
wm_unit_populate_key(brw, &key);
/* Allocate the necessary scratch space if we haven't already. Don't
@@ -267,12 +266,6 @@ static int upload_wm_unit( struct brw_context *brw )
if (brw->wm.state_bo == NULL) {
brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs);
}
-
- for (i = 0; i < 3; i++)
- if (reloc_bufs[i])
- ret |= dri_bufmgr_check_aperture_space(reloc_bufs[i]);
- ret |= dri_bufmgr_check_aperture_space(brw->wm.state_bo);
- return ret;
}
const struct brw_tracked_state brw_wm_unit = {
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 761a5df33f..0f5ba46a19 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -229,7 +229,7 @@ brw_create_texture_surface( struct brw_context *brw,
return bo;
}
-static int
+static void
brw_update_texture_surface( GLcontext *ctx, GLuint unit )
{
struct brw_context *brw = brw_context(ctx);
@@ -237,7 +237,6 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
struct intel_texture_object *intelObj = intel_texture_object(tObj);
struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
struct brw_wm_surface_key key;
- int ret = 0;
memset(&key, 0, sizeof(key));
key.target = tObj->Target;
@@ -253,8 +252,6 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
key.depth = firstImage->Depth;
key.tiling = intelObj->mt->region->tiling;
- ret |= dri_bufmgr_check_aperture_space(key.bo);
-
dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
&key, sizeof(key),
@@ -263,9 +260,6 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
}
-
- ret |= dri_bufmgr_check_aperture_space(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
- return ret;
}
/**
@@ -273,12 +267,11 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
* While it is only used for the front/back buffer currently, it should be
* usable for further buffers when doing ARB_draw_buffer support.
*/
-static int
+static void
brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
unsigned int unit, GLboolean cached)
{
dri_bo *region_bo = NULL;
- int ret = 0;
struct {
unsigned int surface_type;
unsigned int surface_format;
@@ -302,8 +295,6 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
key.width = region->pitch; /* XXX: not really! */
key.height = region->height;
key.cpp = region->cpp;
-
- ret |= dri_bufmgr_check_aperture_space(region->buffer);
} else {
key.surface_type = BRW_SURFACE_NULL;
key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
@@ -367,10 +358,6 @@ brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
region_bo);
}
}
-
- ret |= dri_bufmgr_check_aperture_space(brw->wm.surf_bo[unit]);
-
- return ret;
}
@@ -422,23 +409,19 @@ brw_wm_get_binding_table(struct brw_context *brw)
return bind_bo;
}
-static int prepare_wm_surfaces(struct brw_context *brw )
+static void prepare_wm_surfaces(struct brw_context *brw )
{
GLcontext *ctx = &brw->intel.ctx;
struct intel_context *intel = &brw->intel;
- GLuint i, ret;
+ GLuint i;
if (brw->state.nr_draw_regions > 1) {
for (i = 0; i < brw->state.nr_draw_regions; i++) {
- ret = brw_update_region_surface(brw, brw->state.draw_regions[i], i,
- GL_FALSE);
- if (ret)
- return ret;
+ brw_update_region_surface(brw, brw->state.draw_regions[i], i,
+ GL_FALSE);
}
}else {
- ret = brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
- if (ret)
- return ret;
+ brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
}
brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
@@ -454,11 +437,8 @@ static int prepare_wm_surfaces(struct brw_context *brw )
dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
} else {
- ret = brw_update_texture_surface(ctx, i);
+ brw_update_texture_surface(ctx, i);
brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
-
- if (ret)
- return ret;
}
} else {
dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
@@ -469,8 +449,6 @@ static int prepare_wm_surfaces(struct brw_context *brw )
dri_bo_unreference(brw->wm.bind_bo);
brw->wm.bind_bo = brw_wm_get_binding_table(brw);
-
- return dri_bufmgr_check_aperture_space(brw->wm.bind_bo);
}
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 9ad9f6a6c0..5afaad070c 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -94,10 +94,6 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)
batch->ptr = batch->map;
batch->dirty_state = ~0;
batch->cliprect_mode = IGNORE_CLIPRECTS;
-
- /* account batchbuffer in aperture */
- dri_bufmgr_check_aperture_space(batch->buf);
-
}
struct intel_batchbuffer *
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index e9076f9ac9..7129a4ba91 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -54,7 +54,6 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
struct intel_context *intel;
const intelScreenPrivate *intelScreen;
- int ret;
DBG("%s\n", __FUNCTION__);
@@ -81,6 +80,7 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
unsigned short src_x, src_y;
int BR13, CMD;
int i;
+ dri_bo *aper_array[3];
src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
@@ -116,16 +116,18 @@ intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
}
#endif
/* do space/cliprects check before going any further */
- intel_batchbuffer_require_space(intel->batch, 8 * 4, REFERENCES_CLIPRECTS);
+ intel_batchbuffer_require_space(intel->batch, 8 * 4,
+ REFERENCES_CLIPRECTS);
again:
- ret = dri_bufmgr_check_aperture_space(dst->buffer);
- ret |= dri_bufmgr_check_aperture_space(src->buffer);
-
- if (ret) {
+ aper_array[0] = intel->batch->buf;
+ aper_array[1] = dst->buffer;
+ aper_array[2] = src->buffer;
+
+ if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
intel_batchbuffer_flush(intel->batch);
goto again;
}
-
+
for (i = 0; i < nbox; i++, pbox++) {
drm_clip_rect_t box = *pbox;
@@ -273,17 +275,19 @@ intelEmitCopyBlit(struct intel_context *intel,
GLuint CMD, BR13;
int dst_y2 = dst_y + h;
int dst_x2 = dst_x + w;
- int ret;
+ dri_bo *aper_array[3];
BATCH_LOCALS;
/* do space/cliprects check before going any further */
intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
again:
- ret = dri_bufmgr_check_aperture_space(dst_buffer);
- ret |= dri_bufmgr_check_aperture_space(src_buffer);
- if (ret) {
- intel_batchbuffer_flush(intel->batch);
- goto again;
+ aper_array[0] = intel->batch->buf;
+ aper_array[1] = dst_buffer;
+ aper_array[2] = src_buffer;
+
+ if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
+ intel_batchbuffer_flush(intel->batch);
+ goto again;
}
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index f1116d2747..f9a373cf74 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -294,6 +294,7 @@ extern char *__progname;
#define SUBPIXEL_X 0.125
#define SUBPIXEL_Y 0.125
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
#define INTEL_FIREVERTICES(intel) \