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authorAapo Tahkola <aet@rasterburn.org>2005-05-05 00:28:31 +0000
committerAapo Tahkola <aet@rasterburn.org>2005-05-05 00:28:31 +0000
commit73e8ffe9f36da6b857341a44cfdb94d957d50f31 (patch)
treebe829d6983f8ab351575e4fe03d592cbb86f6a7b /src/mesa
parent286c4cc201390e868c4f9b5ebe14c40db2d74a5d (diff)
Pack tex coord regs at vertex program backend.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.h3
-rw-r--r--src/mesa/drivers/dri/r300/r300_state.c2
-rw-r--r--src/mesa/drivers/dri/r300/r300_vertexprog.c49
3 files changed, 25 insertions, 29 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 72472c4d59..fa6dbbf8af 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -585,9 +585,10 @@ struct r300_vertex_program {
struct r300_vertex_shader_fragment program;
struct r300_vertex_shader_fragment params;
- int t2rs;
+ int pos_end;
unsigned long num_temporaries; /* Number of temp vars used by program */
int inputs[VERT_ATTRIB_MAX];
+ int tex_regs[8];
};
/* 64 appears to be the maximum */
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 1448577e12..922113c920 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -1798,7 +1798,7 @@ void r300SetupVertexProgram(r300ContextPtr rmesa)
R300_STATECHANGE(rmesa, pvs);
rmesa->hw.pvs.cmd[R300_PVS_CNTL_1]=(0 << R300_PVS_CNTL_1_PROGRAM_START_SHIFT)
- | (inst_count/*0*/ << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
+ | (inst_count/*pos_end*/ << R300_PVS_CNTL_1_UNKNOWN_SHIFT)
| (inst_count << R300_PVS_CNTL_1_PROGRAM_END_SHIFT);
rmesa->hw.pvs.cmd[R300_PVS_CNTL_2]=(0 << R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT)
| (param_count << R300_PVS_CNTL_2_PARAM_COUNT_SHIFT);
diff --git a/src/mesa/drivers/dri/r300/r300_vertexprog.c b/src/mesa/drivers/dri/r300/r300_vertexprog.c
index cbcbdcbe6f..d5a4664144 100644
--- a/src/mesa/drivers/dri/r300/r300_vertexprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertexprog.c
@@ -230,8 +230,8 @@ void debug_vp(GLcontext *ctx, struct vertex_program *vp)
}
fprintf(stderr, "%d.", vpi->SrcReg[operand_index].Index);
- /*for(i=0; i < 4; i++)
- fprintf(stderr, "%s", dst_mask_names[vpi->SrcReg[operand_index].Swizzle[i]]);*/
+ for(i=0; i < 4; i++)
+ fprintf(stderr, "%s", dst_mask_names[GET_SWZ(vpi->SrcReg[operand_index].Swizzle, i)]);
if(operand_index+1 < (op_names[operator_index].ip & (~FLAG_MASK)) )
fprintf(stderr, ",");
@@ -313,6 +313,7 @@ static unsigned long t_dst_class(enum register_file file)
static unsigned long t_dst_index(struct r300_vertex_program *vp, struct vp_dst_register *dst)
{
+ int i, high=0;
if(dst->File == PROGRAM_OUTPUT)
switch(dst->Index){
case VERT_RESULT_HPOS:
@@ -320,21 +321,27 @@ static unsigned long t_dst_index(struct r300_vertex_program *vp, struct vp_dst_r
case VERT_RESULT_COL0:
return 1;
case VERT_RESULT_TEX0:
- return 2;
case VERT_RESULT_TEX1:
- return 3;
case VERT_RESULT_TEX2:
- return 4;
case VERT_RESULT_TEX3:
- return 5;
case VERT_RESULT_TEX4:
- return 6;
case VERT_RESULT_TEX5:
- return 7;
case VERT_RESULT_TEX6:
- return 8;
case VERT_RESULT_TEX7:
- return 9;
+ /* Awful hack to get tex coord results regs correctly packed.
+ Wount work if tex coords arent written in logical order! */
+ if(vp->tex_regs[dst->Index - VERT_RESULT_TEX0] != 1){
+ return vp->tex_regs[dst->Index - VERT_RESULT_TEX0];
+ }
+
+ for(i=0; i < 8; i++)
+ if(vp->tex_regs[i] > high)
+ high = vp->tex_regs[i];
+
+ high++;
+ vp->tex_regs[dst->Index - VERT_RESULT_TEX0] = high;
+
+ return high;
case VERT_RESULT_COL1:
case VERT_RESULT_BFC0:
case VERT_RESULT_BFC1:
@@ -517,9 +524,11 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
#else
#define src vpi->SrcReg
#endif
- vp->t2rs=0;
+ vp->pos_end=0; /* Not supported yet */
vp->program.length=0;
vp->num_temporaries=mesa_vp->Base.NumTemporaries;
+ for(i=0; i < 8; i++)
+ vp->tex_regs[i]=1;
for(i=0; i < VERT_ATTRIB_MAX; i++)
vp->inputs[i]=-1;
@@ -593,6 +602,7 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
t_src_class(src[0].File), VSF_FLAG_NONE);
o_inst->src3=0;
+
goto next;
case VP_OPCODE_ADD:
@@ -906,23 +916,8 @@ void translate_vertex_shader(struct r300_vertex_program *vp)
}
}
next: ;
-#if 0
- /* If instruction writes to result and one of the inputs is tmp, we move it at the end of program */
- if(vpi->DstReg.File == PROGRAM_OUTPUT){
- for(operand_index=0; operand_index < operands; operand_index++)
- if(src[operand_index].File == PROGRAM_TEMPORARY){
- t2rs[vp->t2rs++]=*o_inst;
- o_inst--; /* FIXME */
- break;
- }
- }
-#endif
}
-#if 0
- /* Put "tmp to result" instructions in */
- for(i=0; i < vp->t2rs; i++, o_inst++)
- *o_inst=t2rs[i];
-#endif
+
vp->program.length=(o_inst - vp->program.body.i) * 4;
if(u_temp_i < vp->num_temporaries)