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authorMichel Dänzer <michel@tungstengraphics.com>2007-02-28 17:46:07 +0100
committerMichel Dänzer <michel@tungstengraphics.com>2007-02-28 17:46:07 +0100
commit0609b6afa8117893d7b36468158ac6ec2f5642bc (patch)
treed2a4a867ef6d319bf8dbb49e188024384736247c /src
parent3c578455e103664e6f93a7792999da7c06dd9a3f (diff)
i915tex: Sync pages differently when crossing pipe borders.
Don't flip (up to twice) immediately but just arrange things such that the pages will be in sync on both pipes on the next flip.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i915tex/intel_buffers.c30
1 files changed, 18 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i915tex/intel_buffers.c b/src/mesa/drivers/dri/i915tex/intel_buffers.c
index 5eb2a8e5d0..9f1b25ef38 100644
--- a/src/mesa/drivers/dri/i915tex/intel_buffers.c
+++ b/src/mesa/drivers/dri/i915tex/intel_buffers.c
@@ -253,19 +253,25 @@ intelWindowMoved(struct intel_context *intel)
pf_active ? "" : "in");
if (pf_active) {
- int i;
-
/* Sync pages between pipes if we're flipping on both at the same time */
- for (i = 0; i < 2 && pf_pipes != intel_fb->pf_pipes &&
- intel_fb->pf_pipes == 0x3 &&
- (intel->sarea->pf_current_page & 0x3) !=
- ((intel->sarea->pf_current_page) >> 2 & 0x3); i++) {
- drm_i915_flip_t flip;
-
- flip.pipes = (intel_fb->pf_current_page ==
- (intel->sarea->pf_current_page & 0x3)) ? 0x2 : 0x1;
-
- drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
+ if (pf_pipes == 0x3 && pf_pipes != intel_fb->pf_pipes &&
+ (intel->sarea->pf_current_page & 0x3) !=
+ (((intel->sarea->pf_current_page) >> 2) & 0x3)) {
+ if (intel_fb->pf_current_page ==
+ (intel->sarea->pf_current_page & 0x3)) {
+ /* XXX: This is ugly, but emitting two flips 'in a row' can cause
+ * lockups for unknown reasons.
+ */
+ intel->sarea->pf_current_page =
+ intel->sarea->pf_current_page & 0x3;
+ intel->sarea->pf_current_page |=
+ intel->sarea->pf_current_page << 2;
+ } else {
+ intel->sarea->pf_current_page =
+ intel->sarea->pf_current_page & (0x3 << 2);
+ intel->sarea->pf_current_page |=
+ intel->sarea->pf_current_page >> 2;
+ }
}
intel_fb->pf_pipes = pf_pipes;