Checkpoint commit: i915 texture works, use new vertex_info struct

Basic i915 2D texturing seems to work now.
The vertex format is determined from the current fragment shader.

17 files changed, 230 insertions, 232 deletions

diff --git a/src/mesa/pipe/draw/draw_arrays.c b/src/mesa/pipe/draw/draw_arrays.c
index 738fa144b2..430dc15ce2 100644
--- a/src/mesa/pipe/draw/draw_arrays.c
+++ b/src/mesa/pipe/draw/draw_arrays.c
@@ -70,17 +70,53 @@ draw_arrays(struct draw_context *draw, unsigned prim,
 }
 
 
-/* XXX move this into draw_context.c? */
+static INLINE void
+emit_vertex_attr(struct vertex_info *vinfo, uint vfAttr, uint format)
+{
+   const uint n = vinfo->num_attribs;
+   vinfo->attr_mask |= (1 << vfAttr);
+   vinfo->slot_to_attrib[n] = vfAttr;
+   if (n >= 2) {
+      /* the first two slots are the vertex header & clippos */
+      vinfo->attrib_to_slot[vfAttr] = n - 2;
+   }
+   /*printf("Vertex slot %d = vfattrib %d\n", n, vfAttr);*/
+   /*vinfo->interp_mode[n] = interpMode;*/
+   vinfo->format[n] = format;
+   vinfo->num_attribs++;
+
+}
 
-#define EMIT_ATTR( VF_ATTR, STYLE, SIZE )			\
-do {								\
-   if (draw->nr_attrs >= 2)					\
-      draw->vf_attr_to_slot[VF_ATTR] = draw->nr_attrs - 2;	\
-   draw->attrs[draw->nr_attrs].attrib = VF_ATTR;		\
-   /*draw->attrs[draw->nr_attrs].format = STYLE*/;              \
-   draw->nr_attrs++;						\
-   draw->vertex_size += SIZE;					\
-} while (0)
+
+static void
+compute_vertex_size(struct vertex_info *vinfo)
+{
+   uint i;
+
+   vinfo->size = 0;
+   for (i = 0; i < vinfo->num_attribs; i++) {
+      switch (vinfo->format[i]) {
+      case FORMAT_OMIT:
+         break;
+      case FORMAT_4UB:
+         /* fall-through */
+      case FORMAT_1F:
+         vinfo->size += 1;
+         break;
+      case FORMAT_2F:
+         vinfo->size += 2;
+         break;
+      case FORMAT_3F:
+         vinfo->size += 3;
+         break;
+      case FORMAT_4F:
+         vinfo->size += 4;
+         break;
+      default:
+         assert(0);
+      }
+   }
+}
 
 
 void
@@ -88,26 +124,26 @@ draw_set_vertex_attributes( struct draw_context *draw,
                             const unsigned *slot_to_vf_attr,
                             unsigned nr_attrs )
 {
+   struct vertex_info *vinfo = &draw->vertex_info;
    unsigned i;
 
-   memset(draw->vf_attr_to_slot, 0, sizeof(draw->vf_attr_to_slot));
-   draw->nr_attrs = 0;
-   draw->vertex_size = 0;
+   assert(slot_to_vf_attr[0] == VF_ATTRIB_POS);
+
+   memset(vinfo, 0, sizeof(*vinfo));
 
    /*
     * First three attribs are always the same: header, clip pos, winpos
     */
-   EMIT_ATTR(VF_ATTRIB_VERTEX_HEADER, EMIT_1F, 1);
-   EMIT_ATTR(VF_ATTRIB_CLIP_POS, EMIT_4F, 4);
-
-   assert(slot_to_vf_attr[0] == VF_ATTRIB_POS);
-   EMIT_ATTR(slot_to_vf_attr[0], EMIT_4F_VIEWPORT, 4);
+   emit_vertex_attr(vinfo, VF_ATTRIB_VERTEX_HEADER, FORMAT_1F);
+   emit_vertex_attr(vinfo, VF_ATTRIB_CLIP_POS, FORMAT_4F);
+   emit_vertex_attr(vinfo, VF_ATTRIB_POS, FORMAT_4F_VIEWPORT);
 
    /*
     * Remaining attribs (color, texcoords, etc)
     */
-   for (i = 1; i < nr_attrs; i++) 
-      EMIT_ATTR(slot_to_vf_attr[i], EMIT_4F, 4);
+   for (i = 1; i < nr_attrs; i++) {
+      emit_vertex_attr(vinfo, slot_to_vf_attr[i], FORMAT_4F);
+   }
 
-   draw->vertex_size *= 4; /* floats to bytes */
+   compute_vertex_size(vinfo);
 }
diff --git a/src/mesa/pipe/draw/draw_clip.c b/src/mesa/pipe/draw/draw_clip.c
index 7e5ceacdfe..1c2491d2c6 100644
--- a/src/mesa/pipe/draw/draw_clip.c
+++ b/src/mesa/pipe/draw/draw_clip.c
@@ -93,7 +93,7 @@ static void interp( const struct clipper *clip,
 		    const struct vertex_header *out, 
 		    const struct vertex_header *in )
 {
-   const unsigned nr_attrs = clip->stage.draw->nr_attrs;
+   const unsigned nr_attrs = clip->stage.draw->vertex_info.num_attribs;
    unsigned j;
 
    /* Vertex header.
@@ -379,9 +379,9 @@ static void clip_begin( struct draw_stage *stage )
    unsigned nr = stage->draw->nr_planes;
 
    /* sanity checks.  If these fail, review the clip/interp code! */
-   assert(stage->draw->nr_attrs >= 3);
-   assert(stage->draw->attrs[0].attrib == VF_ATTRIB_VERTEX_HEADER);
-   assert(stage->draw->attrs[1].attrib == VF_ATTRIB_CLIP_POS);
+   assert(stage->draw->vertex_info.num_attribs >= 3);
+   assert(stage->draw->vertex_info.slot_to_attrib[0] == VF_ATTRIB_VERTEX_HEADER);
+   assert(stage->draw->vertex_info.slot_to_attrib[1] == VF_ATTRIB_CLIP_POS);
 
    /* Hacky bitmask to use when we hit CLIP_USER_BIT:
     */   
diff --git a/src/mesa/pipe/draw/draw_flatshade.c b/src/mesa/pipe/draw/draw_flatshade.c
index 128acc5b2b..34588c83b6 100644
--- a/src/mesa/pipe/draw/draw_flatshade.c
+++ b/src/mesa/pipe/draw/draw_flatshade.c
@@ -154,7 +154,7 @@ struct draw_stage *draw_flatshade_stage( struct draw_context *draw )
    flatshade->stage.end = flatshade_end;
    flatshade->stage.reset_stipple_counter = flatshade_reset_stipple_counter;
 
-   flatshade->lookup = draw->vf_attr_to_slot;
+   flatshade->lookup = draw->vertex_info.attrib_to_slot;
 
    return &flatshade->stage;
 }
diff --git a/src/mesa/pipe/draw/draw_prim.c b/src/mesa/pipe/draw/draw_prim.c
index 8f409424ca..23eb578221 100644
--- a/src/mesa/pipe/draw/draw_prim.c
+++ b/src/mesa/pipe/draw/draw_prim.c
@@ -282,7 +282,7 @@ run_vertex_program(struct draw_context *draw,
       slot = 1;
       for (attr = 1; attr < VERT_RESULT_MAX; attr++) {
          if (draw->vertex_shader.outputs_written & (1 << attr)) {
-            assert(slot < draw->nr_attrs);
+            assert(slot < draw->vertex_info.num_attribs);
             vOut[j]->data[slot][0] = machine.Outputs[attr].xyzw[0].f[j];
             vOut[j]->data[slot][1] = machine.Outputs[attr].xyzw[1].f[j];
             vOut[j]->data[slot][2] = machine.Outputs[attr].xyzw[2].f[j];
diff --git a/src/mesa/pipe/draw/draw_private.h b/src/mesa/pipe/draw/draw_private.h
index 75f7c5d84e..531bb2e254 100644
--- a/src/mesa/pipe/draw/draw_private.h
+++ b/src/mesa/pipe/draw/draw_private.h
@@ -44,28 +44,7 @@
 #include "pipe/p_state.h"
 #include "pipe/p_defines.h"
 
-
-/* XXX these are temporary */
-struct vf_attr_map {
-   unsigned attrib;
-   /*
-   unsigned format;
-   */
-   unsigned offset;
-};
-#define VF_ATTRIB_POS 0
-#define VF_ATTRIB_COLOR0 3
-#define VF_ATTRIB_COLOR1 4
-#define VF_ATTRIB_BFC0 25
-#define VF_ATTRIB_BFC1 26
-
-#define VF_ATTRIB_CLIP_POS 27
-#define VF_ATTRIB_VERTEX_HEADER 28
-#define VF_ATTRIB_MAX 29
-#define EMIT_1F 0
-#define EMIT_4F 3
-#define EMIT_4F_VIEWPORT 6
-#define FRAG_ATTRIB_MAX 13
+#include "draw_vertex.h"
 
 
 /**
@@ -175,14 +154,9 @@ struct draw_context
    float plane[12][4];
    unsigned nr_planes;
 
-   /*
-    * Vertex attribute info
-    */
-   unsigned vf_attr_to_slot[PIPE_ATTRIB_MAX];
-   struct vf_attr_map attrs[VF_ATTRIB_MAX];
-   unsigned nr_attrs;
+   /** Describes the layout of post-transformation vertices */
+   struct vertex_info vertex_info;
 
-   unsigned vertex_size;       /**< in bytes */
    unsigned nr_vertices;
 
    unsigned prim;   /**< current prim type: PIPE_PRIM_x */
@@ -250,7 +224,7 @@ dup_vert( struct draw_stage *stage,
 	  unsigned idx )
 {   
    struct vertex_header *tmp = stage->tmp[idx];
-   memcpy(tmp, vert, stage->draw->vertex_size );
+   memcpy(tmp, vert, stage->draw->vertex_info.size * sizeof(float) );
    return tmp;
 }
 
diff --git a/src/mesa/pipe/draw/draw_twoside.c b/src/mesa/pipe/draw/draw_twoside.c
index d7d993841b..822cadd61f 100644
--- a/src/mesa/pipe/draw/draw_twoside.c
+++ b/src/mesa/pipe/draw/draw_twoside.c
@@ -163,7 +163,7 @@ struct draw_stage *draw_twoside_stage( struct draw_context *draw )
    twoside->stage.end = twoside_end;
    twoside->stage.reset_stipple_counter = twoside_reset_stipple_counter;
 
-   twoside->lookup = draw->vf_attr_to_slot;
+   twoside->lookup = draw->vertex_info.attrib_to_slot;
 
    return &twoside->stage;
 }
diff --git a/src/mesa/pipe/i915simple/i915_context.h b/src/mesa/pipe/i915simple/i915_context.h
index 849c3b0efc..5de6afa9e9 100644
--- a/src/mesa/pipe/i915simple/i915_context.h
+++ b/src/mesa/pipe/i915simple/i915_context.h
@@ -33,6 +33,8 @@
 #include "pipe/p_defines.h"
 #include "pipe/p_state.h"
 
+#include "pipe/draw/draw_vertex.h"
+
 
 #define I915_TEX_UNITS 8
 
@@ -77,30 +79,6 @@
 #define I915_MAX_CONSTANT  32
 
 
-/**
- * New vertex format stuff...
- */
-#define MAX_VERT_ATTRIBS 12  /* OK? */
-
-#define FORMAT_OMIT 0
-#define FORMAT_1F   1
-#define FORMAT_2F   2
-#define FORMAT_3F   3
-#define FORMAT_4F   4
-#define FORMAT_4UB  5
-
-struct vertex_info
-{
-   uint num_attribs;
-   uint hwfmt[2];      /** hardware format info for this format */
-   uint attr_mask;     /** mask of VF_ATTR_ bits */
-   uint slot_to_attrib[MAX_VERT_ATTRIBS];
-   uint interp_mode[MAX_VERT_ATTRIBS];
-   uint format[MAX_VERT_ATTRIBS];   /**< FORMAT_x */
-};
-
-
-
 
 struct i915_cache_context;
 
@@ -129,7 +107,7 @@ struct i915_state
    /* texture image buffers */
    unsigned texbuffer[I915_TEX_UNITS][2];
 
-   /* vertex format registers */
+   /** Describes the current hardware vertex layout */
    struct vertex_info vertex_info;
 
    unsigned id;			/* track lost context events */
diff --git a/src/mesa/pipe/i915simple/i915_debug.c b/src/mesa/pipe/i915simple/i915_debug.c
index 79060e9780..d142194d84 100644
--- a/src/mesa/pipe/i915simple/i915_debug.c
+++ b/src/mesa/pipe/i915simple/i915_debug.c
@@ -692,10 +692,14 @@ static boolean i915_debug_packet( struct debug_stream *stream )
       case 0x31:
 	 return debug_chain(stream, "MI_BATCH_BUFFER_START", 2);
       default:
+         (void)debug(stream, "UNKNOWN 0x0 case!", 1);
+         assert(0);
 	 break;
       }
       break;
    case 0x1:
+      (void) debug(stream, "UNKNOWN 0x1 case!", 1);
+      assert(0);
       break;
    case 0x2:
       switch ((cmd >> 22) & 0xff) {	 
@@ -735,6 +739,8 @@ static boolean i915_debug_packet( struct debug_stream *stream )
 	 case 0x11:
 	    return debug(stream, "3DSTATE_DEPTH_SUBRECTANGLE_DISABLE", 1);
 	 default:
+            (void) debug(stream, "UNKNOWN 0x1c case!", 1);
+            assert(0);
 	    break;
 	 }
 	 break;
diff --git a/src/mesa/pipe/i915simple/i915_fpc.h b/src/mesa/pipe/i915simple/i915_fpc.h
index af347c7c8c..7bbfc69d29 100644
--- a/src/mesa/pipe/i915simple/i915_fpc.h
+++ b/src/mesa/pipe/i915simple/i915_fpc.h
@@ -38,55 +38,6 @@
 
 #define I915_PROGRAM_SIZE 192
 
-#define MAX_VARYING 8
-
-enum
-{
-   FRAG_ATTRIB_WPOS = 0,
-   FRAG_ATTRIB_COL0 = 1,
-   FRAG_ATTRIB_COL1 = 2,
-   FRAG_ATTRIB_FOGC = 3,
-   FRAG_ATTRIB_TEX0 = 4,
-   FRAG_ATTRIB_TEX1 = 5,
-   FRAG_ATTRIB_TEX2 = 6,
-   FRAG_ATTRIB_TEX3 = 7,
-   FRAG_ATTRIB_TEX4 = 8,
-   FRAG_ATTRIB_TEX5 = 9,
-   FRAG_ATTRIB_TEX6 = 10,
-   FRAG_ATTRIB_TEX7 = 11,
-   FRAG_ATTRIB_VAR0 = 12,  /**< shader varying */
-   FRAG_ATTRIB_MAX = (FRAG_ATTRIB_VAR0 + MAX_VARYING)
-};
-
-/**
- * Bitflags for fragment program input attributes.
- */
-/*@{*/
-#define FRAG_BIT_WPOS  (1 << FRAG_ATTRIB_WPOS)
-#define FRAG_BIT_COL0  (1 << FRAG_ATTRIB_COL0)
-#define FRAG_BIT_COL1  (1 << FRAG_ATTRIB_COL1)
-#define FRAG_BIT_FOGC  (1 << FRAG_ATTRIB_FOGC)
-#define FRAG_BIT_TEX0  (1 << FRAG_ATTRIB_TEX0)
-#define FRAG_BIT_TEX1  (1 << FRAG_ATTRIB_TEX1)
-#define FRAG_BIT_TEX2  (1 << FRAG_ATTRIB_TEX2)
-#define FRAG_BIT_TEX3  (1 << FRAG_ATTRIB_TEX3)
-#define FRAG_BIT_TEX4  (1 << FRAG_ATTRIB_TEX4)
-#define FRAG_BIT_TEX5  (1 << FRAG_ATTRIB_TEX5)
-#define FRAG_BIT_TEX6  (1 << FRAG_ATTRIB_TEX6)
-#define FRAG_BIT_TEX7  (1 << FRAG_ATTRIB_TEX7)
-#define FRAG_BIT_VAR0  (1 << FRAG_ATTRIB_VAR0)
-
-#define MAX_DRAW_BUFFERS 4
-
-enum
-{
-   FRAG_RESULT_COLR = 0,
-   FRAG_RESULT_COLH = 1,
-   FRAG_RESULT_DEPR = 2,
-   FRAG_RESULT_DATA0 = 3,
-   FRAG_RESULT_MAX = (FRAG_RESULT_DATA0 + MAX_DRAW_BUFFERS)
-};
-
 
 
 /**
@@ -95,6 +46,8 @@ enum
 struct i915_fp_compile {
    struct pipe_shader_state *shader;
 
+   struct vertex_info *vertex_info;
+
    uint declarations[I915_PROGRAM_SIZE];
    uint program[I915_PROGRAM_SIZE];
 
diff --git a/src/mesa/pipe/i915simple/i915_fpc_emit.c b/src/mesa/pipe/i915simple/i915_fpc_emit.c
index 235938ac04..f062885f8a 100644
--- a/src/mesa/pipe/i915simple/i915_fpc_emit.c
+++ b/src/mesa/pipe/i915simple/i915_fpc_emit.c
@@ -199,6 +199,7 @@ uint i915_emit_texld( struct i915_fp_compile *p,
        * do).  Will fallback for now.
        */
       i915_program_error(p, "Can't (yet) swizzle TEX arguments");
+      assert(0);
       return 0;
    }
 
diff --git a/src/mesa/pipe/i915simple/i915_fpc_translate.c b/src/mesa/pipe/i915simple/i915_fpc_translate.c
index cd2faa8b97..44a869abaf 100644
--- a/src/mesa/pipe/i915simple/i915_fpc_translate.c
+++ b/src/mesa/pipe/i915simple/i915_fpc_translate.c
@@ -32,6 +32,9 @@
 #include "pipe/tgsi/core/tgsi_token.h"
 #include "pipe/tgsi/core/tgsi_parse.h"
 
+#include "pipe/draw/draw_vertex.h"
+
+
 /**
  * Simple pass-through fragment shader to use when we don't have
  * a real shader (or it fails to compile for some reason).
@@ -124,7 +127,7 @@ static uint
 src_vector(struct i915_fp_compile *p,
            const struct tgsi_full_src_register *source)
 {
-   const uint index = source->SrcRegister.Index;
+   uint index = source->SrcRegister.Index;
    uint src;
 
    switch (source->SrcRegister.File) {
@@ -145,23 +148,62 @@ src_vector(struct i915_fp_compile *p,
        * 
        * We also use a texture coordinate to pass wpos when possible.
        */
+#if 1
+      /* use vertex format info to remap input regs */
+      assert(index < p->vertex_info->num_attribs);
+      printf("%s map index %d to %d\n",
+             __FUNCTION__,
+             index,
+             p->vertex_info->slot_to_attrib[index]);
+
+      index = p->vertex_info->slot_to_attrib[index];
+
+      switch (index) {
+      case VF_ATTRIB_POS:
+         assert(p->wpos_tex != -1);
+         src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
+         break;
+      case VF_ATTRIB_COLOR0:
+         src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
+         break;
+      case VF_ATTRIB_COLOR1:
+         src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
+         src = swizzle(src, X, Y, Z, ONE);
+         break;
+      case VF_ATTRIB_FOG:
+         src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
+         src = swizzle(src, W, W, W, W);
+         break;
+      case VF_ATTRIB_TEX0:
+      case VF_ATTRIB_TEX1:
+      case VF_ATTRIB_TEX2:
+      case VF_ATTRIB_TEX3:
+      case VF_ATTRIB_TEX4:
+      case VF_ATTRIB_TEX5:
+      case VF_ATTRIB_TEX6:
+      case VF_ATTRIB_TEX7:
+         src = i915_emit_decl(p, REG_TYPE_T,
+                              T_TEX0 + (index - VF_ATTRIB_TEX0),
+                              D0_CHANNEL_ALL);
+         break;
+
+      default:
+         i915_program_error(p, "Bad source->Index");
+         return 0;
+      }
+
+#else
       switch (index) {
       case FRAG_ATTRIB_WPOS:
+         assert(p->wpos_tex != -1);
          src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
          break;
       case FRAG_ATTRIB_COL0:
          src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
          break;
       case FRAG_ATTRIB_COL1:
-#if 1
          src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
          src = swizzle(src, X, Y, Z, ONE);
-#else
-         /* total hack to force texture mapping */
-         src = i915_emit_decl(p, REG_TYPE_T,
-                              T_TEX0/* + (index - FRAG_ATTRIB_TEX0)*/,
-                              D0_CHANNEL_ALL);
-#endif
          break;
       case FRAG_ATTRIB_FOGC:
          src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
@@ -184,6 +226,8 @@ src_vector(struct i915_fp_compile *p,
          i915_program_error(p, "Bad source->Index");
          return 0;
       }
+#endif
+
       break;
 
    case TGSI_FILE_CONSTANT:
@@ -877,6 +921,8 @@ i915_init_compile(struct i915_context *i915,
 
    p->shader = &i915->fs;
 
+   p->vertex_info = &i915->current.vertex_info;
+
    /* new constants found during translation get appended after the
     * user-provided constants.
     */
diff --git a/src/mesa/pipe/i915simple/i915_prim_emit.c b/src/mesa/pipe/i915simple/i915_prim_emit.c
index ff57d26d38..caac6b1f2a 100644
--- a/src/mesa/pipe/i915simple/i915_prim_emit.c
+++ b/src/mesa/pipe/i915simple/i915_prim_emit.c
@@ -58,7 +58,7 @@ static INLINE struct setup_stage *setup_stage( struct draw_stage *stage )
 }
 
 
-
+#if 0
 /* Hardcoded vertex format: xyz/rgba
  */
 static INLINE void
@@ -75,15 +75,22 @@ emit_hw_vertex( struct i915_context *i915,
                        float_to_ubyte( vertex->data[1][0] ),
                        float_to_ubyte( vertex->data[1][3] )) );
 }
-		
-		
+#endif
+
 
+/**
+ * Extract the needed fields from vertex_header and emit i915 dwords.
+ * Recall that the vertices are constructed by the 'draw' module and
+ * have a couple of slots at the beginning (1-dword header, 4-dword
+ * clip pos) that we ignore here.
+ */
 static INLINE void
 emit_hw_vertex2( struct i915_context *i915,
                  const struct vertex_header *vertex)
 {
    const struct vertex_info *vinfo = &i915->current.vertex_info;
    uint i;
+   uint count = 0;  /* for debug/sanity */
 
    for (i = 0; i < vinfo->num_attribs; i++) {
       switch (vinfo->format[i]) {
@@ -92,32 +99,38 @@ emit_hw_vertex2( struct i915_context *i915,
          break;
       case FORMAT_1F:
          OUT_BATCH( fui(vertex->data[i][0]) );
+         count++;
          break;
       case FORMAT_2F:
          OUT_BATCH( fui(vertex->data[i][0]) );
          OUT_BATCH( fui(vertex->data[i][1]) );
+         count += 2;
          break;
       case FORMAT_3F:
          OUT_BATCH( fui(vertex->data[i][0]) );
          OUT_BATCH( fui(vertex->data[i][1]) );
          OUT_BATCH( fui(vertex->data[i][2]) );
+         count += 3;
          break;
       case FORMAT_4F:
          OUT_BATCH( fui(vertex->data[i][0]) );
          OUT_BATCH( fui(vertex->data[i][1]) );
          OUT_BATCH( fui(vertex->data[i][2]) );
          OUT_BATCH( fui(vertex->data[i][3]) );
+         count += 4;
          break;
       case FORMAT_4UB:
          OUT_BATCH( pack_ub4(float_to_ubyte( vertex->data[i][2] ),
                              float_to_ubyte( vertex->data[i][1] ),
                              float_to_ubyte( vertex->data[i][0] ),
                              float_to_ubyte( vertex->data[i][3] )) );
+         count += 1;
          break;
       default:
          assert(0);
       }
    }
+   assert(count == vinfo->size);
 }
 
 
@@ -129,10 +142,16 @@ emit_prim( struct draw_stage *stage,
 	   unsigned nr )
 {
    struct i915_context *i915 = setup_stage(stage)->i915;
+#if 0
    unsigned vertex_size = 4 * sizeof(int);
+#else
+   unsigned vertex_size = i915->current.vertex_info.size * 4; /* in bytes */
+#endif
    unsigned *ptr;
    unsigned i;
 
+   assert(vertex_size >= 12); /* never smaller than 12 bytes */
+
    if (i915->dirty)
       i915_update_derived( i915 );
 
diff --git a/src/mesa/pipe/i915simple/i915_state.c b/src/mesa/pipe/i915simple/i915_state.c
index 8f8b13253d..f5ea721cc8 100644
--- a/src/mesa/pipe/i915simple/i915_state.c
+++ b/src/mesa/pipe/i915simple/i915_state.c
@@ -156,7 +156,6 @@ static void i915_set_constant_buffer(struct pipe_context *pipe,
       if (buf->size &&
           (mapped = ws->buffer_map(ws, buf->buffer, PIPE_BUFFER_FLAG_READ))) {
          memcpy(i915->current.constants[shader], mapped, buf->size);
-         fprintf(stderr, "i915 problem: map of constant buffer failed\n");
          ws->buffer_unmap(ws, buf->buffer);
          i915->current.num_user_constants[shader]
             = buf->size / (4 * sizeof(float));
diff --git a/src/mesa/pipe/i915simple/i915_state_derived.c b/src/mesa/pipe/i915simple/i915_state_derived.c
index bd952cc567..f8c56775ea 100644
--- a/src/mesa/pipe/i915simple/i915_state_derived.c
+++ b/src/mesa/pipe/i915simple/i915_state_derived.c
@@ -25,8 +25,10 @@
  * 
  **************************************************************************/
 
-#include "vf/vf.h"
+
+#include "pipe/p_util.h"
 #include "pipe/draw/draw_context.h"
+#include "pipe/draw/draw_vertex.h"
 #include "i915_context.h"
 #include "i915_state.h"
 #include "i915_reg.h"
@@ -67,12 +69,47 @@ emit_vertex_attr(struct vertex_info *vinfo, uint vfAttr, uint format)
    const uint n = vinfo->num_attribs;
    vinfo->attr_mask |= (1 << vfAttr);
    vinfo->slot_to_attrib[n] = vfAttr;
+   printf("Vertex slot %d = vfattrib %d\n", n, vfAttr);
    /*vinfo->interp_mode[n] = interpMode;*/
    vinfo->format[n] = format;
    vinfo->num_attribs++;
 }
 
 
+/**
+ * Recompute the vinfo->size field.
+ */
+static void
+compute_vertex_size(struct vertex_info *vinfo)
+{
+   uint i;
+
+   vinfo->size = 0;
+   for (i = 0; i < vinfo->num_attribs; i++) {
+      switch (vinfo->format[i]) {
+      case FORMAT_OMIT:
+         break;
+      case FORMAT_4UB:
+         /* fall-through */
+      case FORMAT_1F:
+         vinfo->size += 1;
+         break;
+      case FORMAT_2F:
+         vinfo->size += 2;
+         break;
+      case FORMAT_3F:
+         vinfo->size += 3;
+         break;
+      case FORMAT_4F:
+         vinfo->size += 4;
+         break;
+      default:
+         assert(0);
+      }
+   }
+}
+
+
 
 /**
  * Determine which post-transform / pre-rasterization vertex attributes
@@ -111,7 +148,7 @@ static void calculate_vertex_layout( struct i915_context *i915 )
       }
    }
 
-   for (i = FRAG_ATTRIB_TEX0; i < FRAG_ATTRIB_MAX; i++) {
+   for (i = FRAG_ATTRIB_TEX0; i <= FRAG_ATTRIB_TEX7/*MAX*/; i++) {
       uint hwtc;
       if (inputsRead & (1 << i)) {
          hwtc = TEXCOORDFMT_4D;
@@ -140,6 +177,8 @@ static void calculate_vertex_layout( struct i915_context *i915 )
       }
    }
 
+   compute_vertex_size(vinfo);
+
    /* If the attributes have changed, tell the draw module about the new
     * vertex layout.  We'll also update the hardware vertex format info.
     */
diff --git a/src/mesa/pipe/i915simple/i915_state_emit.c b/src/mesa/pipe/i915simple/i915_state_emit.c
index ceb96289b5..48eb86091d 100644
--- a/src/mesa/pipe/i915simple/i915_state_emit.c
+++ b/src/mesa/pipe/i915simple/i915_state_emit.c
@@ -190,37 +190,39 @@ i915_emit_hardware_state(struct i915_context *i915 )
    }
 
 
-#if 0
+#if 01
       /* texture images */
       if (i915->hardware_dirty & I915_HW_MAP)
       {
          const uint nr = i915->current.sampler_enable_nr;
-         const uint enabled = i915->current.sampler_enable_flags;
-         uint unit;
-         uint count = 0;
-         OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
-         OUT_BATCH(enabled);
-         for (unit = 0; unit < I915_TEX_UNITS; unit++) {
-            if (enabled & (1 << unit)) {
-               struct pipe_buffer_handle *buf =
-                  i915->texture[unit]->region->buffer;
-               uint offset = 0;
-               assert(buf);
-
-               count++;
-
-               OUT_RELOC(buf,
-                         I915_BUFFER_ACCESS_READ,
-                         offset);
-               OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
-               OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
+         if (nr) {
+            const uint enabled = i915->current.sampler_enable_flags;
+            uint unit;
+            uint count = 0;
+            OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
+            OUT_BATCH(enabled);
+            for (unit = 0; unit < I915_TEX_UNITS; unit++) {
+               if (enabled & (1 << unit)) {
+                  struct pipe_buffer_handle *buf =
+                     i915->texture[unit]->region->buffer;
+                  uint offset = 0;
+                  assert(buf);
+
+                  count++;
+
+                  OUT_RELOC(buf,
+                            I915_BUFFER_ACCESS_READ,
+                            offset);
+                  OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
+                  OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
+               }
             }
+            assert(count == nr);
          }
-         assert(count == nr);
       }
 #endif
 
-#if 0
+#if 01
    /* samplers */
    if (i915->hardware_dirty & I915_HW_SAMPLER) 
    {
diff --git a/src/mesa/pipe/i915simple/i915_state_immediate.c b/src/mesa/pipe/i915simple/i915_state_immediate.c
index c6f1f59f88..81f2051be1 100644
--- a/src/mesa/pipe/i915simple/i915_state_immediate.c
+++ b/src/mesa/pipe/i915simple/i915_state_immediate.c
@@ -53,17 +53,22 @@ static void upload_S2S4(struct i915_context *i915)
    unsigned LIS2, LIS4;
    
    /* I915_NEW_VERTEX_FORMAT */
-#if 01
+#if 0
    LIS2 = 0xffffffff;
    LIS4 = (S4_VFMT_XYZ | S4_VFMT_COLOR);
 #else
+   /*
    assert(LIS2 == i915->current.vertex_info.hwfmt[1]);
    assert(LIS4 == i915->current.vertex_info.hwfmt[0]);
+   */
    LIS2 = i915->current.vertex_info.hwfmt[1];
    LIS4 = i915->current.vertex_info.hwfmt[0];
-   printf("UPLOAD FORMAT LIS2: 0x%x  LIS4: 0x%x\n", LIS2, LIS4);
 #endif
-
+   printf("DEFAULT FORMT LIS2: 0x%x  LIS4: 0x%x\n", ~0, (S4_VFMT_XYZ | S4_VFMT_COLOR));
+   printf("UPLOAD FORMAT LIS2: 0x%x  LIS4: 0x%x\n", LIS2, LIS4);
+   printf("VF FORMAT     LIS2: 0x%x  LIS4: 0x%x\n",
+          i915->current.vertex_info.hwfmt[1],
+          i915->current.vertex_info.hwfmt[0]);
 
    /* I915_NEW_SETUP */
    switch (i915->setup.cull_mode) {
diff --git a/src/mesa/pipe/softpipe/sp_state_derived.c b/src/mesa/pipe/softpipe/sp_state_derived.c
index eba789e9c4..af230111dc 100644
--- a/src/mesa/pipe/softpipe/sp_state_derived.c
+++ b/src/mesa/pipe/softpipe/sp_state_derived.c
@@ -28,72 +28,12 @@
 #include "pipe/p_util.h"
 
 #include "pipe/draw/draw_context.h"
+#include "pipe/draw/draw_vertex.h"
 
 #include "sp_context.h"
 #include "sp_state.h"
 
 
-/* XXX: copied from vf.h */
-enum {
-   VF_ATTRIB_POS = 0,
-   VF_ATTRIB_WEIGHT = 1,
-   VF_ATTRIB_NORMAL = 2,
-   VF_ATTRIB_COLOR0 = 3,
-   VF_ATTRIB_COLOR1 = 4,
-   VF_ATTRIB_FOG = 5,
-   VF_ATTRIB_COLOR_INDEX = 6,
-   VF_ATTRIB_EDGEFLAG = 7,
-   VF_ATTRIB_TEX0 = 8,
-   VF_ATTRIB_TEX1 = 9,
-   VF_ATTRIB_TEX2 = 10,
-   VF_ATTRIB_TEX3 = 11,
-   VF_ATTRIB_TEX4 = 12,
-   VF_ATTRIB_TEX5 = 13,
-   VF_ATTRIB_TEX6 = 14,
-   VF_ATTRIB_TEX7 = 15,
-   VF_ATTRIB_VAR0 = 16,
-   VF_ATTRIB_VAR1 = 17,
-   VF_ATTRIB_VAR2 = 18,
-   VF_ATTRIB_VAR3 = 19,
-   VF_ATTRIB_VAR4 = 20,
-   VF_ATTRIB_VAR5 = 21,
-   VF_ATTRIB_VAR6 = 22,
-   VF_ATTRIB_VAR7 = 23,
-   VF_ATTRIB_POINTSIZE = 24,
-   VF_ATTRIB_BFC0 = 25,
-   VF_ATTRIB_BFC1 = 26,
-   VF_ATTRIB_CLIP_POS = 27,
-   VF_ATTRIB_VERTEX_HEADER = 28,
-   VF_ATTRIB_MAX = 29
-};
-
-/* XXX: copied from config.h */
-#define MAX_VARYING 8
-
-/* XXX: copied from mtypes.h */
-enum
-{
-   FRAG_ATTRIB_WPOS = 0,
-   FRAG_ATTRIB_COL0 = 1,
-   FRAG_ATTRIB_COL1 = 2,
-   FRAG_ATTRIB_FOGC = 3,
-   FRAG_ATTRIB_TEX0 = 4,
-   FRAG_ATTRIB_TEX1 = 5,
-   FRAG_ATTRIB_TEX2 = 6,
-   FRAG_ATTRIB_TEX3 = 7,
-   FRAG_ATTRIB_TEX4 = 8,
-   FRAG_ATTRIB_TEX5 = 9,
-   FRAG_ATTRIB_TEX6 = 10,
-   FRAG_ATTRIB_TEX7 = 11,
-   FRAG_ATTRIB_VAR0 = 12,  /**< shader varying */
-   FRAG_ATTRIB_MAX = (FRAG_ATTRIB_VAR0 + MAX_VARYING)
-};
-
-#define FRAG_BIT_COL0  (1 << FRAG_ATTRIB_COL0)
-#define FRAG_BIT_COL1  (1 << FRAG_ATTRIB_COL1)
-
-
-
 
 #define EMIT_ATTR( VF_ATTR, FRAG_ATTR, INTERP )			\
 do {								\