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authorDave Airlie <airlied@redhat.com>2009-02-10 04:56:16 +1000
committerDave Airlie <airlied@redhat.com>2009-02-10 04:56:16 +1000
commitd2fa89140ebc5cfdd93dcb37d6106e78b01c34d8 (patch)
treea8b4c48ee6015642ab17d223b3fa0be5e8cbed88 /src
parentccf7814a315f0be05cdc36ca358e2917a3d4ac19 (diff)
r200: invalidate texture paths in some more places
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/r200/r200_tex.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 52edf7ed0c..cf0a32bf89 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -43,8 +43,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "main/teximage.h"
#include "main/texobj.h"
-#include "texmem.h"
-
#include "radeon_mipmap_tree.h"
#include "r200_context.h"
#include "r200_state.h"
@@ -211,6 +209,9 @@ static void r200SetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
{
GLuint anisotropy = (t->pp_txfilter & R200_MAX_ANISO_MASK);
+ /* Force revalidation to account for switches from/to mipmapping. */
+ t->validated = GL_FALSE;
+
t->pp_txfilter &= ~(R200_MIN_FILTER_MASK | R200_MAG_FILTER_MASK);
t->pp_txformat_x &= ~R200_VOLUME_FILTER_MASK;
@@ -389,7 +390,11 @@ static void r200TexParameter( GLcontext *ctx, GLenum target,
* we just have to rely on loading the right subset of mipmap levels
* to simulate a clamped LOD.
*/
- driSwapOutTextureObject( (driTextureObject *) t );
+ if (t->mt) {
+ radeon_miptree_unreference(t->mt);
+ t->mt = 0;
+ t->validated = GL_FALSE;
+ }
break;
default: