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authorMichel Dänzer <daenzer@vmware.com>2009-08-11 09:16:48 +0200
committerMichel Dänzer <daenzer@vmware.com>2009-08-11 09:16:48 +0200
commite93be5132c24becf4f7f3d30de4b76300af0b6a4 (patch)
treebd75596caca6edf401bce224578d474d9e8895d1 /src
parentbb913680031f8ed3fc7e293c9874dea3571510b1 (diff)
r300g: Fix up remaining VAP_CNTL_STATUS writes for big endian.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r300/r300_surface.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 22196e3a9f..a093f83945 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -144,7 +144,11 @@ validate:
r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0);
} else {
BEGIN_CS(4);
- OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS);
+ OUT_CS_REG(R300_VAP_CNTL_STATUS,
+#ifdef PIPE_ARCH_BIG_ENDIAN
+ R300_VC_32BIT_SWAP |
+#endif
+ R300_VAP_TCL_BYPASS);
OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
R300_PVS_NUM_CNTLRS(5) |
R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
@@ -282,7 +286,11 @@ validate:
r300_emit_vertex_program_code(r300, &r300_passthrough_vertex_shader, 0);
} else {
BEGIN_CS(4);
- OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VAP_TCL_BYPASS);
+ OUT_CS_REG(R300_VAP_CNTL_STATUS,
+#ifdef PIPE_ARCH_BIG_ENDIAN
+ R300_VC_32BIT_SWAP |
+#endif
+ R300_VAP_TCL_BYPASS);
OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
R300_PVS_NUM_CNTLRS(5) |
R300_PVS_NUM_FPUS(caps->num_vert_fpus) |