diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-08-20 15:01:11 -0700 | 
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-20 16:17:40 -0700 | 
| commit | 3ce2eccbfb925a3af0b91a89a9f7a3603fa45d2d (patch) | |
| tree | e65cdc727a5d30a7189fd71d567867ab49191ea8 /src | |
| parent | 35c127362f7b0c186923934f34148de319093cbf (diff) | |
i965: Set the destination horiz stride even for da16, as SNB seems to need it.
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_structs.h | 4 | 
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 0d5d17f501..523f119f43 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -75,6 +75,8 @@ static void brw_set_dest( struct brw_instruction *insn,        else {  	 insn->bits1.da16.dest_subreg_nr = dest.subnr / 16;  	 insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; +	 /* even ignored in da16, still need to set as '01' */ +	 insn->bits1.da16.dest_horiz_stride = 1;        }     }     else { @@ -90,6 +92,8 @@ static void brw_set_dest( struct brw_instruction *insn,        }        else {  	 insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; +	 /* even ignored in da16, still need to set as '01' */ +	 insn->bits1.ia16.dest_horiz_stride = 1;        }     } diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h index 1d6018fa36..cdd2998627 100644 --- a/src/mesa/drivers/dri/i965/brw_structs.h +++ b/src/mesa/drivers/dri/i965/brw_structs.h @@ -1360,7 +1360,7 @@ struct brw_instruction  	 GLuint dest_writemask:4;  	 GLuint dest_subreg_nr:1;  	 GLuint dest_reg_nr:8; -	 GLuint pad1:2; +	 GLuint dest_horiz_stride:2;  	 GLuint dest_address_mode:1;        } da16; @@ -1374,7 +1374,7 @@ struct brw_instruction  	 GLuint dest_writemask:4;  	 GLint dest_indirect_offset:6;  	 GLuint dest_subreg_nr:3; -	 GLuint pad1:2; +	 GLuint dest_horiz_stride:2;  	 GLuint dest_address_mode:1;        } ia16;     } bits1;  | 
