r600g: cleanup definition, fix segfault when no valid pixel shader

Signed-off-by: Jerome Glisse <jglisse@redhat.com>

3 files changed, 40 insertions, 37 deletions

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 455730320e..62cd8f567a 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -711,9 +711,9 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
 	alu.src[0] = r600_src[0];
 	alu.src[0].chan = tgsi_chan(&inst->Src[0], 0);
 		
-	alu.src[1].sel = SQ_ALU_SRC_LITERAL;
+	alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
 	alu.src[1].chan = 0;
-	alu.src[2].sel = SQ_ALU_SRC_LITERAL;
+	alu.src[2].sel = V_SQ_ALU_SRC_LITERAL;
 	alu.src[2].chan = 1;
 	alu.last = 1;
 	r = r600_bc_add_alu(ctx->bc, &alu);
@@ -756,9 +756,9 @@ static int tgsi_trig(struct r600_shader_ctx *ctx)
 	alu.src[0].sel = ctx->temp_reg;
 	alu.src[0].chan = 0;
 		
-	alu.src[1].sel = SQ_ALU_SRC_LITERAL;
+	alu.src[1].sel = V_SQ_ALU_SRC_LITERAL;
 	alu.src[1].chan = 0;
-	alu.src[2].sel = SQ_ALU_SRC_LITERAL;
+	alu.src[2].sel = V_SQ_ALU_SRC_LITERAL;
 	alu.src[2].chan = 1;
 	alu.last = 1;
 	r = r600_bc_add_alu(ctx->bc, &alu);
@@ -810,7 +810,7 @@ static int tgsi_kill(struct r600_shader_ctx *ctx)
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = ctx->inst_info->r600_opcode;
 		alu.dst.chan = i;
-		alu.src[0].sel = SQ_ALU_SRC_0;
+		alu.src[0].sel = V_SQ_ALU_SRC_0;
 		r = tgsi_src(ctx, &inst->Src[0], &alu.src[1]);
 		if (r)
 			return r;
@@ -869,7 +869,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	/* dst.x, <- 1.0  */
 	memset(&alu, 0, sizeof(struct r600_bc_alu));
 	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-	alu.src[0].sel  = SQ_ALU_SRC_1; /*1.0*/
+	alu.src[0].sel  = V_SQ_ALU_SRC_1; /*1.0*/
 	alu.src[0].chan = 0;
 	r = tgsi_dst(ctx, &inst->Dst[0], 0, &alu.dst);
 	if (r)
@@ -885,7 +885,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	r = tgsi_src(ctx, &inst->Src[0], &alu.src[0]);
 	if (r)
 		return r;
-	alu.src[1].sel  = SQ_ALU_SRC_0; /*0.0*/
+	alu.src[1].sel  = V_SQ_ALU_SRC_0; /*0.0*/
 	alu.src[1].chan = tgsi_chan(&inst->Src[0], 0);
 	r = tgsi_dst(ctx, &inst->Dst[0], 1, &alu.dst);
 	if (r)
@@ -906,7 +906,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
 	/* dst.w, <- 1.0  */
 	memset(&alu, 0, sizeof(struct r600_bc_alu));
 	alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-	alu.src[0].sel  = SQ_ALU_SRC_1;
+	alu.src[0].sel  = V_SQ_ALU_SRC_1;
 	alu.src[0].chan = 0;
 	r = tgsi_dst(ctx, &inst->Dst[0], 3, &alu.dst);
 	if (r)
@@ -1050,7 +1050,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
 	struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction;
 	struct r600_bc_alu alu;
 	struct r600_bc_alu_src r600_src[3];
-	int i, j, r;
+	int i, r;
 
 	r = tgsi_split_constant(ctx, r600_src);
 	if (r)
@@ -1067,7 +1067,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
 		alu.src[0] = r600_src[0];
 		alu.src[0].chan = tgsi_chan(&inst->Src[0], i);
 
-		alu.src[1].sel = SQ_ALU_SRC_1;
+		alu.src[1].sel = V_SQ_ALU_SRC_1;
 
 		alu.src[2] = r600_src[0];
 		alu.src[2].chan = tgsi_chan(&inst->Src[0], i);
@@ -1090,7 +1090,7 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
 		alu.src[0].sel = ctx->temp_reg;
 		alu.src[0].neg = 1;
 
-		alu.src[1].sel = SQ_ALU_SRC_1;
+		alu.src[1].sel = V_SQ_ALU_SRC_1;
 		alu.src[1].neg = 1;
 
 		alu.src[2].sel = ctx->temp_reg;
@@ -1192,13 +1192,13 @@ static int tgsi_dp(struct r600_shader_ctx *ctx)
 		switch (ctx->inst_info->tgsi_opcode) {
 		case TGSI_OPCODE_DP2:
 			if (i > 1) {
-				alu.src[0].sel = alu.src[1].sel = SQ_ALU_SRC_0;
+				alu.src[0].sel = alu.src[1].sel = V_SQ_ALU_SRC_0;
 				alu.src[0].chan = alu.src[1].chan = 0;
 			}
 			break;
 		case TGSI_OPCODE_DP3:
 			if (i > 2) {
-				alu.src[0].sel = alu.src[1].sel = SQ_ALU_SRC_0;
+				alu.src[0].sel = alu.src[1].sel = V_SQ_ALU_SRC_0;
 				alu.src[0].chan = alu.src[1].chan = 0;
 			}
 			break;
@@ -1255,7 +1255,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
 		}
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV;
-		alu.src[0].sel = SQ_ALU_SRC_1;
+		alu.src[0].sel = V_SQ_ALU_SRC_1;
 		alu.src[0].chan = 0;
 		alu.dst.sel = ctx->temp_reg;
 		alu.dst.chan = 3;
@@ -1322,7 +1322,7 @@ static int tgsi_lrp(struct r600_shader_ctx *ctx)
 	for (i = 0; i < 4; i++) {
 		memset(&alu, 0, sizeof(struct r600_bc_alu));
 		alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_ADD;
-		alu.src[0].sel = SQ_ALU_SRC_1;
+		alu.src[0].sel = V_SQ_ALU_SRC_1;
 		alu.src[0].chan = 0;
 		alu.src[1] = r600_src[0];
 		alu.src[1].chan = tgsi_chan(&inst->Src[0], i);
diff --git a/src/gallium/drivers/r600/r600_sq.h b/src/gallium/drivers/r600/r600_sq.h
index 819624e689..ad4de0b072 100644
--- a/src/gallium/drivers/r600/r600_sq.h
+++ b/src/gallium/drivers/r600/r600_sq.h
@@ -206,6 +206,26 @@
 #define   S_SQ_ALU_WORD0_SRC0_SEL(x)                                 (((x) & 0x1FF) << 0)
 #define   G_SQ_ALU_WORD0_SRC0_SEL(x)                                 (((x) >> 0) & 0x1FF)
 #define   C_SQ_ALU_WORD0_SRC0_SEL                                    0xFFFFFE00
+/*
+ * 244  ALU_SRC_1_DBL_L: special constant 1.0 double-float, LSW. (RV670+)
+ * 245  ALU_SRC_1_DBL_M: special constant 1.0 double-float, MSW. (RV670+)
+ * 246  ALU_SRC_0_5_DBL_L: special constant 0.5 double-float, LSW. (RV670+)
+ * 247  ALU_SRC_0_5_DBL_M: special constant 0.5 double-float, MSW. (RV670+)
+ * 248  SQ_ALU_SRC_0: special constant 0.0.
+ * 249  SQ_ALU_SRC_1: special constant 1.0 float.
+ * 250  SQ_ALU_SRC_1_INT: special constant 1 integer.
+ * 251  SQ_ALU_SRC_M_1_INT: special constant -1 integer.
+ * 252  SQ_ALU_SRC_0_5: special constant 0.5 float.
+ * 253  SQ_ALU_SRC_LITERAL: literal constant.
+ * 254  SQ_ALU_SRC_PV: previous vector result.
+ * 255  SQ_ALU_SRC_PS: previous scalar result.
+ */
+#define     V_SQ_ALU_SRC_0                                           0x000000F8
+#define     V_SQ_ALU_SRC_1                                           0x000000F9
+#define     V_SQ_ALU_SRC_1_INT                                       0x000000FA
+#define     V_SQ_ALU_SRC_M_1_INT                                     0x000000FB
+#define     V_SQ_ALU_SRC_0_5                                         0x000000FC
+#define     V_SQ_ALU_SRC_LITERAL                                     0x000000FD
 #define   S_SQ_ALU_WORD0_SRC0_REL(x)                                 (((x) & 0x1) << 9)
 #define   G_SQ_ALU_WORD0_SRC0_REL(x)                                 (((x) >> 9) & 0x1)
 #define   C_SQ_ALU_WORD0_SRC0_REL                                    0xFFFFFDFF
@@ -583,25 +603,4 @@
 #define   G_SQ_TEX_WORD2_SRC_SEL_W(x)                                (((x) >> 29) & 0x7)
 #define   C_SQ_TEX_WORD2_SRC_SEL_W                                   0x1FFFFFFF
 
-/*
- * 244  ALU_SRC_1_DBL_L: special constant 1.0 double-float, LSW. (RV670+)
- * 245  ALU_SRC_1_DBL_M: special constant 1.0 double-float, MSW. (RV670+)
- * 246  ALU_SRC_0_5_DBL_L: special constant 0.5 double-float, LSW. (RV670+)
- * 247  ALU_SRC_0_5_DBL_M: special constant 0.5 double-float, MSW. (RV670+)
- * 248	SQ_ALU_SRC_0: special constant 0.0.
- * 249	SQ_ALU_SRC_1: special constant 1.0 float.
- * 250	SQ_ALU_SRC_1_INT: special constant 1 integer.
- * 251	SQ_ALU_SRC_M_1_INT: special constant -1 integer.
- * 252	SQ_ALU_SRC_0_5: special constant 0.5 float.
- * 253	SQ_ALU_SRC_LITERAL: literal constant.
- * 254	SQ_ALU_SRC_PV: previous vector result.
- * 255	SQ_ALU_SRC_PS: previous scalar result.
- */
-#define SQ_ALU_SRC_0 248
-#define SQ_ALU_SRC_1 249
-#define SQ_ALU_SRC_1_INT 250
-#define SQ_ALU_SRC_M_1_INT 251
-#define SQ_ALU_SRC_0_5 252
-#define SQ_ALU_SRC_LITERAL 253
-
 #endif
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 3943ebacb3..93fc68e42e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -980,15 +980,19 @@ static struct radeon_state *r600_dsa(struct r600_context *rctx)
 	struct r600_screen *rscreen = rctx->screen;
 	unsigned db_depth_control, alpha_test_control, alpha_ref, db_shader_control;
 	unsigned stencil_ref_mask, stencil_ref_mask_bf;
-	struct r600_shader *rshader = &rctx->ps_shader->shader;
+	struct r600_shader *rshader;
 	struct radeon_state *rstate;
 	int i;
 
+	if (rctx->ps_shader == NULL) {
+		return NULL;
+	}
 	rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA);
 	if (rstate == NULL)
 		return NULL;
 
 	db_shader_control = 0x210;
+	rshader = &rctx->ps_shader->shader;
 	for (i = 0; i < rshader->noutput; i++) {
 		if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
 			db_shader_control |= 1;